Programmable Analog Tile Programming Tool for MTPMIC Design
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Solution Overview
Problem
Existing power management integrated circuits (PMICs) require significant engineering effort and time to customize for specific customer requirements due to their irregular shapes and shared circuitry, leading to increased costs and longer time-to-market, as well as inclusion of unused circuitry.
Innovation Solution
A Multi-Tile Power Management Integrated Circuit (MTPMIC) comprising regularly shaped, programmable PMIC tiles with a standardized bus for signal transmission and writable registers, allowing for flexible tile selection, placement, configuration, and programming using the Analog Tile Selection, Placement, Configuration, and Programming (ATSPCP) tool, which simplifies the design process and eliminates the need for custom routing layers and memory structures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If custom PMIC designs are created to meet specific customer requirements, then functional capability is improved, but engineering effort and time-to-market increase significantly
Solution Approach 1:
The PMIC is divided into multiple independently designable modules or blocks, each performing a specific function (voltage regulation, current management, charging, etc.). These modules can be selectively combined to create custom PMIC designs without requiring complete redesign of the entire system, thereby reducing engineering effort while maintaining functional adaptability.
Solution Approach 2:
The patent implements a universal PMIC architecture with standardized interfaces and configurable modules that can serve multiple functions. The same base PMIC design can be adapted to different customer requirements by enabling/disabling specific modules or configuring parameters, eliminating the need for separate custom designs for each application.
2Adaptability or versatility
If PMICs are designed with a large range of functionality to meet various customer requirements, then adaptability is improved, but device size and cost increase due to unused circuitry
Solution Approach 1:
The PMIC functionality is segmented into discrete, independently controllable modules. Only the modules required for a specific application are activated and integrated into the final design, while unused modules are excluded. This approach provides a wide range of available functionality without including unnecessary circuitry in each specific implementation, thereby reducing device size and cost.
Solution Approach 2:
The PMIC architecture allows dynamic configuration of functional modules through software or hardware controls. Modules can be enabled or disabled based on the specific application requirements, allowing the same physical device to adapt its functionality and size to match the actual needs of different customers without including permanent unused circuitry.
3Productivity
If analog circuits are designed with irregular shapes and shared circuitry to optimize functionality, then functional efficiency is improved, but ease of manufacture and customization deteriorate
Solution Approach 1:
The PMIC design uses regularly shaped, modular blocks with standardized interfaces rather than irregular custom layouts. Each module can be independently manufactured and tested using standard fabrication processes, improving ease of manufacture. The modular architecture allows simple selection and combination of modules for customization without requiring complex manual layout adjustments, thereby maintaining ease of customization while preserving functional efficiency through optimized module designs.
Data Source
AI summary
A programmable analog tile integrated circuit programming tool communicates a power management control characteristic query soliciting control requirement information for a novel power management integrated circuit (PMIC) tile in a multi-tile power management integrated circuit (MTPMIC). The programming tool receives a user response to the query indicating control requirements across a network. The novel PMIC tiles have a pre-defined physical structure including all memory structures required for configuration of each tile and a bus portion. When combined in a multi-tile power management integrated circuit (MTPMIC), the bus portions of the selected tiles automatically form a standardized bus that accommodates all signal communication required for a functioning MTPMIC. The memory structure of each tile is individually addressable via the standardized bus. Thus, in response to control requirements, the programming tool programs a PMIC tile that is part of a MTPMIC to meet the control requirements.