Programmable Branch Table for Complex Multi-Way Branching
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Solution Overview
Problem
Existing processor systems are inefficient in handling complex branching operations, requiring multiple instructions to evaluate multiple conditional expressions and jump to one of several possible targets, which increases code size and reduces execution performance.
Innovation Solution
A programmable branch table is used to atomically evaluate multiple conditional expressions, allowing a single instruction to specify the evaluation of arbitrary conditional expressions and jump to one of multiple possible targets, thereby reducing code size and enhancing performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple simple two-way conditional branch instructions are used to evaluate multiple conditional expressions, then the branching function can be implemented, but the code size increases and execution performance decreases
Solution Approach 1:
The patent merges multiple simple two-way conditional branch instructions into a single complex multi-way branch instruction. The branch instruction evaluates multiple conditional expressions (C0 through C15) simultaneously and directly jumps to one of multiple target locations based on the combined evaluation results, eliminating the need for sequential multiple branch instructions and reducing code size.
Solution Approach 2:
The patent creates a universal branch instruction that can handle any combination of conditional expressions and map to any number of target locations. The instruction uses condition codes from multiple conditional expressions to index into a branch table, which contains multiple target addresses, allowing a single instruction to perform the work of many simpler instructions.
2Adaptability or versatility
If multiple simple two-way conditional branch instructions are used to evaluate multiple conditional expressions, then the branching function can be implemented, but the execution time increases
Solution Approach 1:
The patent combines multiple conditional expression evaluations and branch decisions into a single atomic instruction execution. The processor evaluates all conditional expressions (C0-C15) simultaneously within the single branch instruction, generates all condition codes in parallel, and performs a single branch decision based on the combined results, significantly reducing execution time compared to sequential multiple branch instructions.
Solution Approach 2:
The patent pre-computes and stores multiple target addresses in a branch table during instruction preparation. When the branch instruction executes, the condition codes directly index into this pre-prepared table to retrieve the target address, eliminating the need for sequential comparison and branch decisions during execution.
3Productivity
If a single instruction evaluates multiple conditional expressions and jumps to multiple targets, then code size is reduced and performance is improved, but the device complexity increases
Solution Approach 1:
The patent introduces a branch table as an intermediary data structure that stores multiple target addresses. The complex mapping logic between conditional expressions and target locations is externalized into this table, which the single branch instruction indexes using condition codes. This mediator handles the complexity of multi-way branching while keeping the instruction format relatively simple.
4Device complexity
If conventional branch instructions are used, then the processor structure is simple, but the handling of complex branching operations is inefficient
Solution Approach 1:
The patent makes the branch instruction dynamic and configurable by introducing condition codes that can represent any combination of conditional expression results. The branch table dynamically maps these condition codes to appropriate target addresses, allowing the same instruction structure to adapt to different complex branching scenarios without requiring multiple specialized instructions.
Data Source
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AI summary
Methods and systems consistent with the present invention provide a programmable table which allows software to define a plurality of branching functions, each of which maps a vector of condition codes to a branch offset. This technique allows for a flexible multi-way branching functionality, using a conditional branch outcome table that can be specified by a programmer. Any instruction can specify the evaluation of arbitrary conditional expressions to compute the values for the condition codes, and can choose a particular branching function. When the processor executes the instruction, the processor's arithmetic/logical functional units evaluate the conditional expressions and then the processor performs the branch operation, according to the specified branching function.