Programmable Bridge Chiplet for Heterogeneous PHY Interconnect

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Solution Overview

Problem

Current chiplet enablement architectures lack a flexible standards-based interconnect scheme, preventing chiplets from different vendors from communicating effectively due to proprietary protocols, which limits the mainstream adoption of chiplet-based designs.

Innovation Solution

A bridge chiplet with multiple PHY interfaces and adapter logic is introduced, capable of routing data between chiplets with different physical layer interfaces and communication protocols, enabling heterogeneous integration and communication.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If proprietary protocols are used for chiplet interconnection, then communication between chiplets is enabled, but compatibility between chiplets from different vendors is prevented

Engineering Contradiction:
Improvecommunication reliabilityVSAvoidvendor compatibility
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent introduces a standards-based interconnect layer as an intermediary between proprietary chiplet interfaces and the external world. This interconnect layer translates proprietary protocols into standardized communication patterns, enabling chiplets from different vendors to communicate through a common interface while maintaining their proprietary internal protocols.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent creates a universal interconnect architecture that can handle multiple proprietary protocols simultaneously. The interconnect layer is designed to support various vendor-specific protocols through a single standardized interface, making the system versatile and compatible with chiplets from different manufacturers.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Adaptability or versatility

If multiple proprietary protocols are supported, then vendor-specific functionality is preserved, but system complexity increases

Engineering Contradiction:
Improveprotocol supportVSAvoidinterconnect complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent segments the interconnect functionality into distinct layers: a standardized lower layer for universal communication and upper layers for proprietary protocol handling. This segmentation allows each layer to be optimized independently, reducing overall system complexity while maintaining support for multiple protocols.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The standards-based interconnect acts as a mediator that simplifies complexity by providing a uniform interface. Instead of managing multiple proprietary protocols directly, the system uses the standardized interconnect to translate and manage protocol diversity, thereby reducing the complexity burden on individual chiplets.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Productivity

If chiplet functionality is aggregated into monolithic dies, then integration density increases, but manufacturing costs increase

Engineering Contradiction:
Improveintegration densityVSAvoidfabrication cost
Core Design Contradiction:
ProductivityVSEase of manufacture

Solution Approach 1:

The patent divides the integrated circuit into separate chiplet modules that can be manufactured independently using optimized processes for each function. These segmented chiplets are then interconnected through standardized interfaces, achieving high integration density without the cost penalty of monolithic fabrication.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent creates a universal interconnect platform that enables different chiplets to be combined in various configurations. This universality allows the same interconnect architecture to support multiple functional combinations, reducing development and manufacturing costs compared to custom monolithic designs.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS11100028B1Programmable I/O switch/bridge chiplet
Publication Date: 2021.08.24 CADENCE DESIGN SYST INC
  • US11100028B1 patent drawing
  • US11100028B1 patent drawing
  • US11100028B1 patent drawing

AI summary

A flexible standards-based bridge or switch chiplet facilitates heterogeneous integration of chiplets that support different physical layer (PHY) interfaces and communication protocols. The bridge chiplet is configured with multiple PHY interfaces and associated adapter logic and translation logic for translation between different PHY interfaces and protocols. The bridge chiplet can be programmed to serve as a die-to-die interconnect bridge that routes data between multiple chiplets supporting different PHYs and interconnect protocols. Some embodiments of the bridge chiplet can serve solely as a PHY bridge, while others may serve as a bridge for both PHYs and protocols.