Programmable Buffer Circuit for Rail-To-Rail ADC Sensor Inputs
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Solution Overview
Problem
Analog-to-digital converters (ADCs) with low input impedance can degrade sensor accuracy by drawing excessive current, and existing buffer circuits often fail to operate over a full rail-to-rail analog voltage range, particularly at low input voltages.
Innovation Solution
A programmable buffer circuit with multiple modules for gain, level shifting, chopping, and filtering, which can operate in differential or single-ended mode, and includes a charge pump to compensate for voltage offsets, allowing operation at low input voltages and adjustable power settings.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If ADC with low input impedance is used, then ADC can be simplified and cost reduced, but sensor accuracy is degraded due to excessive current drawing
Solution Approach 1:
A buffer circuit is introduced as an intermediary component between the sensor and the ADC. The buffer has high input impedance that does not load the sensor, and low output impedance that can drive the ADC input, thus protecting sensor accuracy while enabling ADC operation
Solution Approach 2:
The system is divided into three separate functional blocks: the sensor, the buffer circuit, and the ADC. This segmentation allows each component to be optimized independently - the sensor for accuracy, the buffer for impedance matching, and the ADC for conversion functionality
2Adaptability or versatility
If buffer circuit is designed for full rail-to-rail operation, then voltage range is extended, but circuit complexity and difficulty of manufacture increase
Solution Approach 1:
The buffer circuit uses dynamic compensation techniques where the charge pump actively adjusts voltage levels in real-time to maintain proper operation across the full rail-to-rail range. This dynamic approach allows extended voltage range without requiring overly complex static circuit design
Solution Approach 2:
The circuit parameters such as voltage offsets and charge pump timing are programmably adjusted to optimize performance for different input voltage ranges. This allows the same buffer circuit to handle full rail-to-rail voltages by changing operational parameters rather than redesigning the circuit topology
3Measurement precision
If buffer circuit operates at low input voltages, then low voltage signal accuracy is improved, but voltage offsets become more significant
Solution Approach 1:
The charge pump applies a preliminary compensating voltage that counteracts the inherent voltage offsets before they can degrade the low voltage signal accuracy. By proactively introducing an equal and opposite voltage correction, the system prevents offset errors from affecting measurement precision
Solution Approach 2:
The buffer circuit incorporates feedback mechanisms that monitor the actual output voltage and adjust the charge pump compensation accordingly. This closed-loop feedback ensures that voltage offsets are continuously corrected to maintain accurate low voltage signal operation
Data Source
AI summary
A buffer circuit includes an input configured to receive an input signal; and a buffer configured to generate an output signal based on the input signal. In an embodiment, the output signal has a linear relationship with the input signal when the input signal is within the input voltage range; and the buffer circuit further includes a level-shifting circuit coupled with the input, wherein the level shifting circuit determines an input voltage range, and wherein one of an upper limit and a lower limit of the input voltage range is within 50 millivolts from a supply rail voltage. In another embodiment, the buffer circuit further includes a programmable chopping module coupled with the buffer, wherein the programmable chopping module is programmable with a selected configuration from a plurality of configurations, and wherein the programmable chopping modulates the input signal based on the selected configuration. In yet another embodiment, the buffer circuit further includes a programmable output filter coupled with the buffer, wherein the programmable output filter is programmable with a selected configuration from a plurality of configurations, and wherein the programmable output filter filters a frequency band of the output signal based on the selected configuration.