Programmable Chip Addressing for Display Systems
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Solution Overview
Problem
Conventional chip addressing methods in image display systems are complex, prone to signal interference, and require additional hardware or pin settings, leading to increased complexity and inefficiency, especially when dealing with large display panels divided into multiple blocks for local dimming.
Innovation Solution
A programmable addressing method that uses a serial interface to set chip addresses without additional pins or resistance, where each chip has input enable, output enable, data input, and clock terminals, allowing sequential address setting and enabling, reducing hardware complexity and enabling flexible address configuration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If external pin settings are used to determine driving chip addresses, then each driving chip can be assigned a unique address, but the hardware complexity increases due to additional pins and connection requirements
Solution Approach 1:
The patent replaces the mechanical pin-setting approach with an electrical signal-based address assignment system. The system unit sends address signals through the serial interface to programmatically configure chip addresses, eliminating the need for physical pin modifications and reducing hardware complexity while maintaining reliable address assignment.
Solution Approach 2:
The patent changes the address assignment from fixed hardware parameters (pin configurations) to programmable software parameters. By allowing the system unit to dynamically set addresses through serial communication, the system achieves flexible address configuration without additional hardware complexity.
2Ease of operation
If internal ADC is used to detect external input voltage for determining chip addresses, then address setting can be automated, but signal interference affects decision-making accuracy
Solution Approach 1:
The patent introduces a dedicated address signal transmission path as an intermediary between the system unit and driving chips. This separate communication channel transmits address information without being affected by signal interference in the main data transmission path, ensuring accurate address assignment while maintaining automation.
3Productivity
If time slot method is used for data transmission, then sequential data delivery to multiple chips is achieved, but transmission failures require retransmission of all data increasing time costs
Solution Approach 1:
The patent segments the data transmission process into two independent phases: first, the system unit sends address signals to all chips sequentially; second, the system unit transmits data to chips based on their addresses. This segmentation allows address configuration and data transmission to occur in separate steps, so that address errors can be corrected without requiring retransmission of all data, significantly reducing time losses.
Data Source
AI summary
Addressing method for multiple chips is provided. Each chip includes an input enable terminal, an output enable terminal, a data input terminal, and a clock terminal. The output enable terminal of a previous stage is connected to the input enable terminal of a next stage. The method includes setting an initial address to an address of each chip via a system; setting a state of each chip to a disable state; enabling the state of a first-one chip among the chips to an enable state, and setting the first chip as a previous-stage chip; updating the address of the previous-stage chip; enabling a next-stage chip connected after the previous-stage chip, in which the system controls the output enable terminal of the previous-stage chip to output an enable signal to enable the next-stage chip, according to the address of the previous-stage chip; and the updating the address of the next-stage chip.