Programmable Chip Enable and Address Circuitry for Semiconductor Memory
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Solution Overview
Problem
In semiconductor memory devices, defective memory cells and peripheral circuitry can render entire memory packages unusable due to the inability to isolate and readdress individual defective dies after packaging, leading to yield losses.
Innovation Solution
The implementation of programmable chip enable and chip address circuitry allows for the isolation and readdressing of defective memory dies within a multi-chip package, enabling the override of master enable signals and reconfiguration of unique addresses using programmable circuits like ROM fuses, even after packaging.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional fixed chip enable and address circuitry is used in semiconductor memory devices, then manufacturing process is simple and device structure is straightforward, but defective memory dies cannot be isolated or readdressed after packaging, resulting in entire packages being rejected due to single die failures
Solution Approach 1:
The patent applies dynamics by making the chip enable signal and chip address dynamic and reconfigurable after packaging. Programmable logic circuits allow the chip enable signal to be selectively overridden for defective dies, and programmable address circuits allow readdressing of non-defective dies. This transforms fixed, static circuitry into dynamic, adaptable circuitry that can respond to post-packaging test results, resolving the contradiction between reliability improvement and device complexity.
Solution Approach 2:
The patent implements parameter changes by modifying the electrical characteristics and routing of chip enable signals and chip addresses through programmable circuits. The chip enable parameter can be changed from a universal enable signal to a selectively blocked signal for defective dies. The chip address parameter can be reconfigured to provide continuous addressing ranges by redirecting addresses around defective dies. These parameter changes enable package-level defect management without requiring complete package rejection.
2Productivity
If entire memory packages are rejected due to defective dies, then device manufacturing process is simple with fixed circuitry, but yield losses increase significantly
Solution Approach 1:
The patent applies discarding and recovering by identifying and discarding only the defective dies within a package while recovering and continuing to use the non-defective dies. Through programmable chip enable and address circuits, defective dies are electrically discarded by blocking their enable signals and removing them from the addressable range. The non-defective dies are recovered by reconfiguring the address mapping to provide continuous addressing, allowing the package to be salvaged and returned to production, thereby improving manufacturing yield.
3Adaptability or versatility
If programmable chip enable and address circuitry is implemented, then defective dies can be isolated and non-defective dies can be readdressed, but device structure and manufacturing complexity increase
Solution Approach 1:
The patent applies universality by designing programmable logic circuits that serve multiple functions: normal operation mode where all dies are fully functional, defect isolation mode where specific dies are blocked, and readdressing mode where address mapping is reconfigured. The same programmable circuits handle both chip enable signal modification and chip address reconfiguration, providing universal defect management capability across different defect scenarios without requiring separate dedicated circuits for each function.
Data Source
AI summary
Memory die are provided with programmable chip enable circuitry to allow particular memory die to be disabled after packaging and/or programmable chip address circuitry to allow particular memory die to be readdressed after being packaged. In a multi-chip memory package, a memory die that fails package-level testing can be disabled and isolated from the memory package by a programmable circuit that overrides the master chip enable signal received from the controller or host device. To provide a continuous address range, one or more of the non-defective memory die can be re-addressed using another programmable circuit that replaces the unique chip address provided by the pad bonding. Memory chips can also be also be readdressed after packaging independently of detecting a failed memory die.