Programmable Chip Enable Circuitry for Memory Die Isolation
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Solution Overview
Problem
Semiconductor memory devices often suffer from defective components, leading to yield losses when entire memory packages fail due to a single defective die, as existing defect management schemes cannot effectively isolate and readdress defective memory chips after packaging.
Innovation Solution
Incorporating programmable chip enable and chip address circuitry allows for the isolation and readdressing of defective memory dies within a multi-chip package, enabling the override of master chip enable signals and reconfiguration of unique addresses using programmable circuits like ROM fuses, even after packaging.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If wafer level testing is conducted to identify defective memory cells, then manufacturing precision is improved, but device complexity increases due to the need for redundant memory cells and defect management schemes
Solution Approach 1:
The patent segments the defect management approach by introducing independent programmable chip enable circuitry for each memory die within a package. This allows individual dies to be selectively enabled or disabled, replacing the need for complex package-level redundancy schemes. The segmentation of control at the die level simplifies the overall defect management architecture.
Solution Approach 2:
The patent utilizes programmable parameters (chip enable signals and chip address assignments) that can be configured after packaging to accommodate defective dies. By changing these parameters programmatically rather than through fixed hardware redundancy, the system achieves defect management with minimal additional complexity.
2Reliability
If entire memory packages are rejected due to defective dies, then reliability is maintained, but productivity decreases due to yield losses
Solution Approach 1:
The patent extracts defective dies from the package by disabling them through programmable chip enable circuitry. This allows the defective components to be removed from the functional system while retaining the rest of the package, thereby maintaining reliability without sacrificing the entire package and improving manufacturing yield.
Solution Approach 2:
The patent discards defective dies by isolating them through programmable control circuits while recovering the functionality of the remaining non-defective dies. This selective discarding and recovery approach maintains package reliability while maximizing the usable capacity and improving overall manufacturing yield.
3Ease of operation
If chip enable pins are tied together for common control, then ease of operation is improved, but adaptability decreases when individual die need to be isolated
Solution Approach 1:
The patent introduces dynamic programmability to the chip enable control mechanism. Instead of a fixed tied-together configuration, each die's chip enable pin can be independently programmed to respond to common or individual control signals, providing both ease of operation and adaptability as needed.
Solution Approach 2:
The programmable chip enable circuitry serves multiple functions: it enables common control when all dies are functional, allows individual die isolation when defects are present, and supports readdressing of non-defective dies. This multi-functional approach maintains ease of operation while providing the adaptability needed for defect management.
4Manufacturing precision
If fixed chip addresses are assigned during packaging, then manufacturing precision is maintained, but adaptability decreases when readdressing is needed to accommodate defects
Solution Approach 1:
The patent makes chip address parameters programmable and changeable after packaging. This allows the address assignment to be precisely established during manufacturing and then modified later to accommodate defective dies, maintaining manufacturing precision while providing the adaptability needed for defect management.
Data Source
AI summary
Memory die are provided with programmable chip enable circuitry to allow particular memory die to be disabled after packaging and/or programmable chip address circuitry to allow particular memory die to be readdressed after being packaged. In a multi-chip memory package, a memory die that fails package-level testing can be disabled and isolated from the memory package by a programmable circuit that overrides the master chip enable signal received from the controller or host device. To provide a continuous address range, one or more of the non-defective memory die can be readdressed using another programmable circuit that replaces the unique chip address provided by the pad bonding. Memory chips can also be also be readdressed after packaging independently of detecting a failed memory die.