Programmable Command Cache for Graphics Processors

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Solution Overview

Problem

Current parallel graphics data processing systems face inefficiencies in processing graphics data due to limitations in programmability and parallel processing capabilities, particularly in handling diverse operations within the graphics pipeline.

Innovation Solution

A graphics processing unit (GPU) is integrated with host/processor cores to accelerate graphics and machine-learning operations, utilizing a parallel processor architecture with multiple processing clusters and a memory crossbar for efficient data processing and distribution across multiple threads, enabling SIMT architectures for enhanced parallel processing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If fixed function computational units are used to process graphics data, then processing efficiency for specific operations is improved, but adaptability to handle diverse operations is worsened

Engineering Contradiction:

Improveprocessing efficiencyVSAvoidadaptability to diverse operations

Core Design Contradiction:

ProductivityVSAdaptability or versatility

Solution Approach 1:

The patent implements a unified computational unit that can execute both fixed-function operations and programmable instructions. The execution unit includes a decoder that can interpret different instruction types and route them to appropriate functional components, allowing the same hardware to perform multiple functions including traditional graphics operations and general-purpose computing tasks.

Inventive Principle:

Principle #6Universality (Multi-functionality)

2Adaptability or versatility

If portions of graphics processors are made programmable, then adaptability to support wider variety of operations is improved, but processing efficiency for specific operations is worsened

Engineering Contradiction:

Improveadaptability to diverse operationsVSAvoidprocessing efficiency

Core Design Contradiction:

Adaptability or versatilityVSProductivity

Solution Approach 1:

The execution unit is divided into specialized functional components including a decoder, address generator, and data processing units. Each component handles specific tasks efficiently while being coordinated by control logic that can execute programmable instructions, thus maintaining both specialization and flexibility.

Inventive Principle:

Principle #1Segmentation

3Productivity

If parallel processing techniques are implemented to process more graphics data, then productivity is improved, but device complexity is worsened

Engineering Contradiction:

Improveparallel processing capabilityVSAvoidprocessor architecture complexity

Core Design Contradiction:

ProductivityVSDevice complexity

Solution Approach 1:

The patent combines multiple execution threads into a single execution unit that can process them in an interleaved manner. The execution unit maintains state for multiple threads and can switch between them, effectively merging the functionality of multiple separate processing units into one integrated component, thus reducing overall system complexity while maintaining parallel processing capability.

Inventive Principle:

Principle #5Merging (Combining)

Data Source

PatentUS10885880B2Programmable controller and command cache for graphics processors

Publication Date: 2021.01.05 INTEL CORP

AI summary

In accordance with some embodiments, a command streamer may use a cache of programmable size to cache commands to improve memory bandwidth and reduce latency. The size of the command cache may be programmably set by the command streamer.