Programmable Gain Current Buffer With Direct And Mirror Signal Paths
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Solution Overview
Problem
Current cellular phone receiver designs face complexity and power consumption issues due to the need for multimode and multiband support, particularly in optimizing analog-digital-converter dynamic range and achieving stringent Image Rejection for higher order modulations like 64QAM.
Innovation Solution
A receiver arrangement featuring a LNA-mixer structure with current buffers and programmable analog filters, which includes direct and mirror path modes for gain control and reduced Image Rejection asymmetry, enabling wide-band input matching and calibration across various frequency ranges.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If a highly programmable analog filter is used to optimize ADC dynamic range across various modes, then power consumption is reduced, but device complexity increases
Solution Approach 1:
The patent implements a highly programmable analog filter with multiple configurable parameters including bandwidth control, center frequency tuning, and quality factor adjustment. The filter can be dynamically reconfigured through digital control interfaces to adapt to different communication modes and bands, enabling optimization of ADC dynamic range while maintaining power efficiency through mode-specific filtering configurations
Solution Approach 2:
The analog filter is designed as a universal component that serves multiple functions across different communication standards and frequency bands. A single filter structure handles GSM, WCDMA, LTE, and other modes with varying bandwidth requirements, eliminating the need for multiple dedicated filters and reducing overall system complexity despite the enhanced programmability of the unified filter
2Productivity
If the receiver supports BW>10 MHz for LTE with higher order modulations, then data throughput is improved, but Image Rejection requirements become more stringent
Solution Approach 1:
The receiver architecture is segmented into multiple parallel paths including wideband LNA paths and image rejection LNA paths, each optimized for specific bandwidth requirements. The signal processing is divided into separate stages with dedicated filtering and mixing functions that work together to achieve both high throughput and stringent image rejection for LTE modes with bandwidths exceeding 10 MHz
Solution Approach 2:
The patent introduces intermediate filtering stages and calibration mechanisms between the LNA and ADC components. These intermediary elements include programmable analog filters and image rejection circuits that mediate between the high-bandwidth signal path and the precision requirements of the ADC, enabling simultaneous achievement of high data throughput and image rejection performance
3Adaptability or versatility
If multiple LNA structures and mixer structures are used to support multiple modes and bands, then receiver versatility is improved, but device complexity increases
Solution Approach 1:
The patent employs universal LNA and mixer structures that can operate across multiple frequency bands and modes through digital control and reconfiguration. Rather than implementing separate dedicated circuits for each mode, the same hardware blocks are programmed and tuned to support GSM, WCDMA, LTE, and other standards, significantly reducing the number of components needed while maintaining full multimode multiband capability
Solution Approach 2:
The LNA-mixer structures incorporate dynamic reconfiguration capabilities through programmable gain control, variable bandwidth filtering, and tunable frequency response. These dynamic elements allow the same hardware to adapt its characteristics in real-time based on the active communication mode and band, enabling versatile operation without requiring static dedicated circuits for each scenario
Data Source
AI summary
A current buffer used in a receiver arrangement includes a direct path mode and a mirror path mode. The direct path mode includes a plurality of first set of transistors and a plurality of first set of current sources turned on while all remaining transistors and current sources are turned off, during the direct path mode a current signal at an input node directly appears at an output node. The mirror path mode includes a first transistor and a first current source being turned off while a plurality of second set of transistors and a plurality of second set of current sources are turned on. The current signal goes through a current mirror pair and appears at the output node with a gain which is controlled by slicing one of transistors of the current mirror pair and a second current source allowing multiple gains in the mirror path mode.