Programmable Delay Circuitry for Power Management
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Solution Overview
Problem
Current power management systems for mobile devices, particularly those with linear RF power amplifiers, face challenges in achieving efficient power usage due to high power consumption, leading to reduced battery life, despite existing solutions like VRAMP power control and buck converter power supplies.
Innovation Solution
The implementation of a programmable delay circuitry with a correction start voltage circuit and a variable delay capacitor, along with a voltage divider circuit and bias current mirror, to stabilize and improve the accuracy of time delays in power management, and a parallel amplifier output impedance compensation circuit that combines VRAMP and high frequency ripple compensation signals to optimize power supply.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If VRAMP power control voltage is used to control the voltage on power amplifier collector, then power management is achieved, but power efficiency remains insufficient
Solution Approach 1:
The patent implements dynamic voltage scaling by adjusting the VRAMP power control voltage in real-time based on the actual power amplifier operating conditions. The system continuously monitors and adapts the voltage level on the power amplifier collector, transitioning from static voltage control to dynamic control that responds to changing signal conditions, thereby improving power efficiency while maintaining adequate power delivery.
2Measurement precision
If conventional power management systems are used, then power delivery is maintained, but transition times are long and accuracy is poor
Solution Approach 1:
The patent applies preliminary action by pre-charging or pre-discharging the variable delay capacitor to anticipated voltage levels before actual switching events occur. The correction start voltage circuit prepares the capacitor in advance based on predicted power amplifier operating conditions, so that when voltage transitions are needed, the capacitor is already close to its target state, significantly reducing transition time and improving time delay accuracy.
Solution Approach 2:
The system implements feedback mechanisms where the actual voltage across the variable delay capacitor is monitored and compared against target values. The correction start voltage circuit adjusts the capacitor voltage based on feedback signals that indicate deviations from expected timing characteristics, continuously refining the time delay accuracy and compensating for variations in power amplifier behavior.
3Adaptability or versatility
If voltage levels change in the circuit supply, then power flexibility is maintained, but variable time delay changes occur
Solution Approach 1:
The patent employs feedback control where the correction start voltage circuit continuously monitors the actual voltage across the variable delay capacitor and compares it against the expected voltage based on the applied correction voltage. When discrepancies occur due to power supply variations, the feedback mechanism adjusts the timing or voltage correction to compensate, maintaining stable time delay characteristics despite changes in circuit supply voltage levels.
Solution Approach 2:
The system dynamically adjusts the correction start voltage parameter based on the actual operating conditions and power supply voltage levels. By changing the correction voltage parameter in response to supply variations, the system compensates for the effects of voltage changes on the variable delay capacitor, maintaining consistent time delay performance across different power supply conditions.
Data Source
AI summary
Programmable delay circuitry, which includes an input buffer circuit and variable delay circuitry, is disclosed. The variable delay circuitry includes an input stage, a correction start voltage circuit, and a variable delay capacitor. The input buffer circuit is coupled to the input stage, the correction start voltage circuit is coupled to the input stage, and the variable delay capacitor is coupled to the input stage. The programmable delay circuitry is configured to provide a fixed time delay and a variable time delay.