Programmable Digital Filter Block for Multi-System Navigation
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Solution Overview
Problem
Conventional digital filter solutions for multi-system navigation receivers lack programmable control and adaptability, particularly in amplitude-frequency responses and decimation factors, which are essential for efficient signal processing and interference immunity across various satellite systems.
Innovation Solution
The implementation of a programmatically controlled Block Multi-Rate Filter (BMRF) system, combined with Finite Impulse Response (FIR) filters, allows for parametric control of digital filter structures and coefficients, enabling flexible and adaptable filtering for each channel, reducing hardware requirements and improving signal processing efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conventional digital filter solutions are used in multi-system navigation receivers, then the hardware implementation is simplified, but the adaptability and programmable control of amplitude-frequency responses and decimation factors are insufficient
Solution Approach 1:
The patent implements a universal digital filter block that can process multiple satellite navigation systems (GPS, GLONASS, Galileo, Beidou) through a single hardware structure. The filter uses programmable coefficients and decimation factors that can be configured via control signals to adapt to different system requirements, eliminating the need for separate dedicated filters for each satellite system while maintaining optimal performance for all of them.
Solution Approach 2:
The patent introduces dynamically adjustable parameters including programmable decimation factors and amplitude-frequency response characteristics. The filter structure allows real-time reconfiguration of its operating parameters through control signals, enabling the same hardware to adapt to different bandwidth requirements and sampling rates needed for various satellite navigation systems and data transmission modes.
2Reliability
If separate digital filters are implemented for each channel to meet specific bandwidth and sampling rate requirements, then the filtering performance for each channel is optimized, but the hardware area and device complexity increase significantly
Solution Approach 1:
The patent merges multiple channel-specific filter functions into a single shared digital filter block. The filter receives inputs from multiple channels and can be dynamically configured to process each channel's signal with appropriate filtering characteristics. This consolidation reduces the total hardware area compared to implementing separate dedicated filters for each channel while maintaining the required filtering performance for all channels.
Solution Approach 2:
The patent employs parameter reconfiguration to adapt the filter's characteristics for different channels. By changing coefficients, decimation factors, and operational parameters through control signals, the same physical filter hardware can deliver channel-optimized filtering performance. This parameter-based adaptation eliminates the need for duplicating filter hardware for each channel.
3Adaptability or versatility
If high-performance processors are used to achieve programmable control of filter parameters, then the flexibility and functionality are improved, but the cost and device complexity increase
Solution Approach 1:
The patent replaces complex high-performance processor-based control with a simplified control mechanism that uses predefined parameter sets stored in memory. Instead of requiring powerful processors to calculate and manage filter parameters in real-time, the system uses control signals to select from pre-optimized parameter configurations, significantly reducing the computational burden and allowing implementation in resource-constrained environments.
Data Source
AI summary
Navigation receiver includes antennas receiving signals from different satellite constellations, Low Noise Amplifiers, a Block of Analog Filters, a Block of Quadrature mixers (BQM) translating in phase and quadrature signals to an intermediate frequency, analog converters digitizing the in phase and quadrature signals, a Block of Digital Quadrature Mixers (BDQM) shifting the digitized signals to zero frequency, a Set Block of Digital Filters (SBDF) band-pass filtering the shifted signals, and reducing a sampling rate, and a Block of Digital Processing (BDP) calculating coordinates, all series-connected; a Block of Digital Generators (BDG) for fine control of the BDQM; and a Block of Analog Generators (BAG) that defines which signal is processed by its corresponding BQM; SBDF including Blocks of Digital Filters (BDFs), each BDF including a chain of Blocks of MultiRate Filters for antialiasing filtering/down-sampling of shifted signals, programmable commutators for controlling decimation, and FIR-filters; each BDF controlled by control block.