Programmable Logic DMA Engine for Data Transfer Bottlenecks
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Traditional computer architectures face inefficiencies in data processing due to the time-consuming nature of data movement between storage devices and processing units, necessitating a solution to enhance data processing performance.
Innovation Solution
A computing apparatus utilizing a programmable logic circuit to implement a DMA engine and physical engines, where data is processed through the DMA engine, significantly reducing data movement time by directly accessing memory and facilitating hardware acceleration computations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If data movement is performed through the CPU in traditional computer architecture, then data can be transferred between storage devices and processing units, but the data transfer time is excessively long and processing efficiency is low
Solution Approach 1:
The patent introduces a DMA engine as an intermediary component between the storage device and the CPU. This DMA engine handles data transfer operations independently, allowing the CPU to focus on computation while the DMA engine manages data movement. The intermediary DMA controller resolves the contradiction by separating data transfer functions from CPU operations, thereby reducing data transfer time and improving overall productivity.
Solution Approach 2:
The patent replaces the traditional CPU-based data movement mechanism with a specialized DMA (Direct Memory Access) engine. This substitution introduces a dedicated hardware component that can perform data transfer operations in parallel with CPU computations, effectively replacing the sequential CPU-mediated transfer mechanism with a more efficient parallel architecture.
2Productivity
If a programmable logic circuit is used to implement DMA engine and physical engines, then data processing performance is improved through hardware acceleration, but device complexity increases
Solution Approach 1:
The patent employs a programmable logic circuit that can be configured to implement multiple functions including the DMA engine and multiple physical engines. This universal hardware platform can be programmed to perform different data processing tasks, providing multi-functionality that improves productivity while avoiding the need for separate dedicated hardware for each function, thereby managing device complexity more effectively.
Solution Approach 2:
The patent uses a dynamically reconfigurable logic circuit that can be programmed to implement different engine configurations based on processing needs. This dynamic capability allows the system to adapt its hardware architecture to specific computational tasks, improving processing performance while maintaining manageable complexity through software-controlled configuration rather than fixed hardware design.
Data Source
AI summary
A computing apparatus includes a first processing circuit and a second processing circuit. The first processing circuit includes a programmable logic circuit. The second processing circuit includes a general purpose processor that is used to execute an application program to download a bitstream to the first processing circuit for programming the programmable logic circuit to implement a direct memory access (DMA) engine and at least one physical engine (PE). The DMA engine is used to access a first memory through a DMA manner. The at least one PE is used to read data to be processed from the first memory through the DMA engine. The first processing circuit and the second processing circuit are disposed in one chip.