Programmable Dummy Cell Self-Timing for SRAM Voltage Mismatch
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Solution Overview
Problem
Conventional self-timed SRAM systems face challenges in accurately tracking the behavior of SRAM cells across varying supply voltages, leading to mismatches between dummy cells and core SRAM cells, which can result in improper self-timing and potential performance losses.
Innovation Solution
The proposed memory system incorporates a dual-plurality of dummy read cells with transistors coupled between the dummy bit line and multiple ground nodes, allowing for programmable delay settings through controllable ground generation circuitry. This design enables precise emulation of worst-case delays across different voltage conditions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional dummy cells are used for self-timing, then the SRAM system can operate with basic timing control, but mismatches occur between dummy cells and core SRAM cells across varying supply voltages
Solution Approach 1:
The patent applies dynamics by making the ground connection of dummy cells adjustable rather than fixed. The dummy cells can dynamically switch between being connected to a fixed ground reference and a variable ground potential, allowing the dummy cell behavior to adapt to different voltage conditions and match core cell characteristics across varying supply voltages.
Solution Approach 2:
The patent changes the ground reference parameter of dummy cells from a fixed value to a programmable value. By adjusting the ground potential of dummy cells, the discharge characteristics and timing behavior can be tuned to match core SRAM cells under different voltage conditions, resolving the mismatch problem.
2Adaptability or versatility
If additional compensation mechanisms are added to track voltage variations, then voltage tracking accuracy improves, but device complexity increases
Solution Approach 1:
The patent makes dummy cells multi-functional by enabling them to serve both as timing references and as voltage-adaptive compensators. The same dummy cell structure is used for both basic self-timing and voltage variation tracking, eliminating the need for separate compensation mechanisms and reducing overall device complexity.
Solution Approach 2:
The dummy cells perform self-adjustment by switching their ground connections based on operating conditions. The system uses the dummy cells themselves to compensate for voltage variations without requiring external compensation circuits, allowing the timing reference to self-adapt to changing voltage conditions.
Data Source
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AI summary
A memory system includes a memory array with first dummy read cells that discharge a dummy bit line, each of the first dummy read cells including a transistor coupled between the dummy bit line and a first ground node that is connected to a ground reference. Second dummy read cells discharge the dummy bit line, each of the dummy read cells including a transistor coupled between the dummy bit line and a second ground node. The dummy read cells cooperate to discharge the dummy bit line in a dummy read operation to provide a self-timing signal. Read circuitry retrieves data from a selected row in the memory array during a read operation, in response to the self-timing signal. Ground generation circuitry connects the second ground node to the ground reference or allows the second ground to float, based upon a control signal.