Programmable ECC Storage Controller for Multi-Field Flash Memory
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Solution Overview
Problem
Conventional storage controllers for flash memory devices lack flexibility in supporting multiple finite fields and error correction capabilities, leading to inefficient use of spare area and inability to dynamically adjust error correction according to different applications.
Innovation Solution
A programmable storage controller with encoding and decoding circuits that support multiple finite fields, error correction capabilities, and codeword lengths, allowing adjustable settings for encoding and decoding data to meet varying ECC requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a conventional control chip employs a single and fixed finite field, then the device complexity is reduced, but the adaptability to support different codeword lengths and ECC requirements deteriorates
Solution Approach 1:
The patent implements a programmable control chip that can dynamically configure the finite field (GF(2^m)) and error correction capability (t) based on different MLC flash memory device requirements. The control chip transitions from a fixed architecture to a reconfigurable one, allowing the same chip to adapt to various codeword lengths and ECC requirements through programming, thereby resolving the contradiction between device complexity and adaptability.
Solution Approach 2:
The patent designs a universal control chip architecture that can support multiple finite fields (GF(2^13), GF(2^14), GF(2^15)) and multiple error correction capabilities within a single device. This multi-functional design allows one control chip to serve multiple MLC flash memory device types with different page lengths and ECC requirements, eliminating the need for multiple specialized chips.
2Device complexity
If a control chip employs a single and fixed error correction capability, then the device complexity is reduced, but the ability to dynamically adjust error correction according to different applications deteriorates
Solution Approach 1:
The patent implements a programmable control chip that can dynamically configure the finite field (GF(2^m)) and error correction capability (t) based on different MLC flash memory device requirements. The control chip transitions from a fixed architecture to a reconfigurable one, allowing the same chip to adapt to various codeword lengths and ECC requirements through programming, thereby resolving the contradiction between device complexity and adaptability.
Solution Approach 2:
The patent allows dynamic adjustment of ECC parameters (finite field size m and error correction capability t) based on application requirements and flash memory device characteristics. By changing these parameters programmatically, the system can optimize error correction performance for different scenarios while managing the complexity through software control rather than hardware multiplication.
3Reliability
If a control chip uses more parity bits to support shorter codeword length, then the error correction capability is improved, but the spare area of the flash memory device is wasted
Solution Approach 1:
The patent allows dynamic adjustment of ECC parameters (finite field size m and error correction capability t) based on application requirements and flash memory device characteristics. By changing these parameters programmatically, the system can optimize error correction performance for different scenarios while managing the complexity through software control rather than hardware multiplication.
Data Source
AI summary
One exemplary storage controller of controlling data access of a storage device includes an encoding circuit and a control circuit. The encoding circuit is programmable to support a plurality of different finite fields, and implemented for generating encoded data according to an adjustable finite field setting. The control circuit is implemented for controlling the adjustable finite field setting of the encoding circuit and recording data into the storage device according to the encoded data. Another exemplary storage controller of controlling data access of a storage device includes a decoding circuit and a control circuit. The decoding circuit is programmable to support a plurality of different finite fields, and implemented for generating decoded data according to an adjustable finite field setting. The control circuit is implemented for reading data from the storage device to obtain readout data and controlling the adjustable finite field setting of the decoding circuit.


