Programmable FFT Core for 802.11n Modems via Danielson-Lanczos Splitting
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Solution Overview
Problem
The IEEE 802.11n standard's data processing in MIMO modem applications lacks flexibility in FFT implementations, being limited to either 64 or 128 points without intermediate options, which restricts throughput enhancements and efficiency.
Innovation Solution
A hardware implementation of a programmable FFT using a 64 FFT core and a wrapper, extending the functionality to 128 points by splitting the FFT into two smaller FFTs based on the Danielson-Lanczos formula, allowing for efficient transformation of data samples and reuse of validated 64 FFT blocks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a 64-point or 128-point FFT is used in the reception chain, then the data processing capability is provided, but the flexibility to switch between different FFT sizes is lost
Solution Approach 1:
The patent divides a 128-point FFT into two separate 64-point FFTs. The input sequence is split into even-indexed and odd-indexed elements, each processed by a dedicated 64-point FFT unit. This segmentation allows the system to reuse existing validated 64-point FFT cores to achieve 128-point functionality, providing flexibility without requiring completely new hardware design.
Solution Approach 2:
The patent creates a universal FFT processing architecture where a single 64-point FFT core can serve dual purposes: processing 64-point FFT directly, or serving as one of two cores for 128-point FFT processing. The control logic dynamically configures the FFT units based on the required transform size, making the hardware adaptable to different FFT requirements.
2Speed
If a hardware FFT implementation is used to meet the 4 us computation time requirement, then the processing speed is improved, but the programmability to handle different FFT sizes is reduced
Solution Approach 1:
The patent implements a dynamic configuration system where the FFT hardware can be reconfigured based on operational requirements. Control logic dynamically selects and configures the number of active FFT units (one or two 64-point units) and their interconnection pattern, allowing the same hardware to adapt between 64-point and 128-point FFT modes while maintaining high-speed hardware processing.
Solution Approach 2:
The patent introduces control logic and data routing mechanisms as intermediaries between the input data and the FFT processing units. These intermediaries dynamically configure the data flow paths, selecting which FFT units are active and how they are connected, thereby enabling programmable flexibility without compromising the speed of the underlying hardware FFT cores.
3Adaptability or versatility
If two separate 64-point FFTs are used to implement a 128-point FFT, then the flexibility and reuse of validated blocks is improved, but the device complexity increases
Solution Approach 1:
The patent implements a nested structure where two 64-point FFT units are organized hierarchically to form a 128-point FFT system. The smaller 64-point units are nested within a larger control framework that manages their operation, data routing, and output combination. This nesting allows reuse of proven 64-point blocks while organizing them systematically to achieve 128-point functionality.
Data Source
AI summary
A method of designing a IEEE 802.11n modem starting from a IEEE 802.11a/g modem using a programmable FFT (Fast Fourier Transform) based on a half length FFT core, modifies data in a reception chain implemented in a IEEE 802.11n standard application. The method uses a N/2 FFT which is validated, along with a wrapper; and, extends and applies the validated N/2 FFT, (e.g., 64 FFT) to a N FFT (e.g., 128 FFT) by splitting the N FFT into two smaller first and second FFTs. The first FFT is applied to selected data samples (e.g., even samples) from the N FFT and the second FFT is applied to remaining data samples (e.g., odd samples) from the N FFT to complete data-handling, wherein the extending step is based on Danielson-Lanczos formula using a reduced number of Cordics. The method is also suitable for IFFT computations in IEEE 802.11n MIMO OFDM modem designs.


