Programmable IC Safety Subsystem for Error Detection and Isolation
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Solution Overview
Problem
Current programmable integrated circuits (ICs) face challenges in meeting high-safety certification standards due to the complexity of ensuring correct operation and isolation of mission-critical functions, which requires separate safety circuits that add design burdens and lengthen the process.
Innovation Solution
A programmable IC is designed with a safety sub-system integrated with a processing sub-system and programmable logic sub-system, featuring both hardware-based and software-based safety functions, with separate power domains and redundant error detection circuits to detect and mitigate errors, and prioritize circuit protection based on user-defined safety policies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate safety circuits are added to ensure correct operation and isolation of mission-critical functions, then safety certification compliance is improved, but device complexity and design burden increase
Solution Approach 1:
The patent merges the safety sub-system with the programmable logic sub-system by integrating shared resources including configuration data storage, power domains, and error detection circuits. This integration allows the safety functions to be implemented within the existing FPGA architecture rather than as completely separate circuits, thereby improving safety certification compliance while limiting the increase in device complexity.
Solution Approach 2:
The safety sub-system is designed to perform multiple safety functions including error detection, mitigation, and isolation across different circuits within the programmable IC. The same safety sub-system infrastructure supports both hard-wired safety functions for first subset circuits and processing circuit safety functions for second subset circuits, reducing overall design burden through multi-functionality.
2Reliability
If hard-wired safety circuits are implemented for first subset circuits, then error detection capability is improved, but circuit integration density decreases
Solution Approach 1:
The patent applies different safety function implementations to different subsets of circuits based on their specific requirements. Hard-wired safety circuits are implemented for the first subset of circuits where high-speed error detection is critical, while processing circuits handle safety functions for the second subset. This localized approach optimizes error detection capability for critical circuits while maintaining overall integration density by not applying the most resource-intensive solution uniformly across all circuits.
3Adaptability or versatility
If processing circuits execute software-based safety functions, then flexibility in safety function implementation is improved, but error response time increases
Solution Approach 1:
The patent segments safety functions into two categories: hard-wired safety functions executed by dedicated hardware circuits for time-critical error detection, and software-based safety functions executed by processing circuits for more flexible but less time-sensitive monitoring. This segmentation allows the system to achieve both fast error response for critical functions and flexibility for adaptive safety behaviors, resolving the contradiction between speed and adaptability.
Data Source
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AI summary
A programmable IC (102, 302) is disclosed that includes a programmable logic sub-system (130, 330), a processing sub-system (110, 310), and a safety sub-system (120, 340). The programmable logic sub-system (130, 330) includes programmable logic circuits configured to form a hardware portion of a user design. The processing sub-system (110, 310) includes processing circuits (112, 312, 314, 316, 318) configured to execute a software portion of a user design. The safety sub-system is configured to perform a safety functions that detect and/or mitigate errors in circuits of the programmable IC (102, 302). The safety sub-system includes hard-wired circuits (122, 341 ) configured to perform hardware-based safety functions (123) for a first subset of circuits of the programmable IC. The safety sub-system also includes a processing circuit (124, 342) configured to execute software-based safety functions (125) for a second subset of circuits of the programmable IC.