Configuring Programmable ICs via Processor Sockets
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Solution Overview
Problem
Existing computer systems face limitations in integrating programmable logic devices (PLDs) with microprocessors due to shared cooling mechanisms in multichip packages and challenges in communicating PLDs with CPU-to-CPU buses in multi-socketed systems.
Innovation Solution
A computer system design that allows programmable integrated circuits to be inserted into existing microprocessor sockets, using existing processor routing connections and leveraging unused memory channels for configuration, enabling direct communication with other microprocessors and memory modules.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If PLDs are formed on PCIe cards, then PLDs can be added to the system, but communication with CPU-to-CPU bus becomes challenging due to consumed links or lack of natural communication path
Solution Approach 1:
The processor socket is designed to be universal, accepting both microprocessors and PLDs. The memory channel interface is also made multi-functional, serving both as memory interface for microprocessors and as configuration/communication interface for PLDs. This allows the same physical infrastructure to support multiple device types and communication modes without adding separate dedicated paths.
Solution Approach 2:
The patent introduces an intermediary configuration protocol and interface layer that enables communication between PLDs and the CPU-to-CPU bus through the memory channel infrastructure. This intermediary layer translates and adapts communication protocols, allowing PLDs to participate in CPU-to-CPU communication without requiring direct physical connections to the bus.
2Ease of operation
If PLDs are integrated into existing microprocessor sockets, then direct communication with microprocessors is enabled, but configuration mechanism must be established using unused resources
Solution Approach 1:
The system uses its own unused memory channel infrastructure to provide the configuration service for PLDs. Instead of requiring external configuration equipment or separate configuration channels, the system repurposes its existing memory interface resources to configure and program the PLDs, making the configuration mechanism self-contained and integrated within the system architecture.
3Adaptability or versatility
If multichip package is used to encapsulate CPU and PLD, then integration is achieved, but performance is limited due to shared cooling mechanism
Solution Approach 1:
Instead of physically integrating CPU and PLD in a single multichip package, the patent segments them into separate components that both fit into processor sockets on the motherboard. This spatial segmentation allows each component to have its own thermal management infrastructure while maintaining logical integration through the system bus and memory channel interface.
Data Source
AI summary
An integrated circuit may include a printed circuit board and multiple processor sockets on the printed circuit board. Each of the multiple processor sockets is operable to receive a microprocessor and a programmable device. When a microprocessor is placed in a processor socket, that microprocessor may communicate with memory dual in-line memory modules (DIMMs). When a programmable device is placed in a processor socket, that programmable device may first be configured using a configuration DIMM and may then communicate with memory DIMMs during normal operation. The configuration DIMM may include multiple options for configuring the programmable device and may also provide additional management functions specifically tailored to the programmable device.