Programmable I/O Interface With Match-Action Packet Processing
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Solution Overview
Problem
Existing computing environments face challenges in providing flexible network interfaces that can adapt to changes in network device structure, protocols, operating systems, and applications while maintaining high performance and operating within power budgets.
Innovation Solution
A programmable IO device interface is introduced, featuring a programmable pipeline with match, action, and DMA stages, enabling customizable host interfaces and hardware offloads, and supporting efficient interaction with various software drivers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If fixed function DMA engine and control registers are used, then device reliability is maintained, but device adaptability deteriorates
Solution Approach 1:
The patent applies dynamics by making the device interface programmable and configurable at runtime. The match-action pipeline can be dynamically reconfigured to handle different network protocols, packet formats, and processing rules without requiring hardware changes. This allows the device to adapt to changing network requirements while maintaining a manageable complexity through structured programming interfaces.
Solution Approach 2:
The patent utilizes parameter changes by allowing software to modify device behavior through configuration registers and programmable match-action rules. Instead of changing hardware architecture, the system changes operational parameters such as match criteria, action sequences, and data structure formats to achieve different functionality, thereby improving adaptability without proportionally increasing complexity.
2Adaptability or versatility
If fixed network interface control structures are used, then device reliability is maintained, but adaptability to protocol changes deteriorates
Solution Approach 1:
The patent implements universality through a unified match-action pipeline that can handle multiple network protocols, packet types, and processing functions through a single programmable interface. The same hardware infrastructure supports Ethernet, InfiniBand, and other protocols by loading different match-action rules, eliminating the need for separate fixed interfaces for each protocol and thereby improving both adaptability and ease of operation.
3Productivity
If conventional fixed function DMA engine is used, then device simplicity is maintained, but processing depth deteriorates
Solution Approach 1:
The patent applies preliminary action by performing packet classification, filtering, and processing decisions in the match-action pipeline before DMA transfer occurs. This preliminary processing identifies and handles time-critical operations early in the pipeline, allowing deeper processing of less time-sensitive data without increasing overall latency, thereby improving processing depth while maintaining low latency.
4Adaptability or versatility
If programmable pipeline with match-action stages is implemented, then adaptability is improved, but device complexity increases
Solution Approach 1:
The patent applies segmentation by dividing the programmable pipeline into distinct match stages and action stages, each with specific functions. This segmentation allows complex processing to be broken down into manageable, reusable building blocks that can be configured through software without requiring the entire pipeline to be redesigned, thereby improving adaptability while controlling complexity through modular architecture.
Data Source
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AI summary
Methods and apparatuses for a programmable IO device interface are provided. The apparatus may comprise: a first memory unit having a plurality of programs stored thereon, the plurality of programs are associated with a plurality of actions comprising updating memory based data structure, inserting a DMA command or initiating an event; a second memory unit for receiving and storing a table result, and the table result is provided by a table engine configured to perform packet match operations on (i) a packet header vector contained in a header portion and (ii) data stored in a programmable match table; and circuitry for executing a program selected from the plurality of programs in response to the table result and an address received by the apparatus, and the program is executed until completion and the program is associated with the programmable match table.