Programmable LDO Circuit with Digital Analog Hybrid Control
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Solution Overview
Problem
Integrated circuit (IC) designs require multiple low dropout regulator (LDO) designs to meet varying specifications, such as low quiescent current and high Power Supply Rejection Ratio (PSRR), leading to significant design efforts due to the need for different LDO configurations for different applications, like IoT and RF transceivers.
Innovation Solution
A modular and configurable LDO circuitry that combines digital and analog LDOs, allowing programmable PSRR through digital control of power p-type switches and optional activation of analog LDOs, which can scale quiescent current consumption with load, and incorporates asynchronous control to minimize voltage droop during load changes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple separate LDO designs are used to meet different specifications (low quiescent current for IoT, high PSRR for RF), then application-specific performance requirements are satisfied, but design complexity and development effort increase significantly
Solution Approach 1:
The patent implements a universal LDO platform that can operate in multiple modes (digital LDO mode for low quiescent current applications like IoT, analog LDO mode for high PSRR applications like RF, and hybrid mode) by selectively enabling different circuit blocks through control signals. This single design satisfies multiple application requirements without needing separate LDO circuits for each application, thereby reducing design complexity while maintaining application-specific performance.
Solution Approach 2:
The patent employs dynamic switching between different LDO configurations and modes based on operational requirements. The control circuit can dynamically enable or disable specific LDO blocks (digital LDO, analog LDO, hybrid LDO) and adjust operating parameters in real-time, allowing the system to adapt to varying performance requirements without physical reconfiguration, thus resolving the contradiction between fixed design and varying application needs.
2Use of energy by moving object
If digital LDO is used to reduce quiescent current consumption, then power efficiency improves for IoT applications, but PSRR performance deteriorates
Solution Approach 1:
The patent merges digital LDO and analog LDO circuits into a hybrid architecture where both types of LDOs can operate simultaneously or selectively. The digital LDO provides low quiescent current operation for normal IoT applications, while the analog LDO can be activated to boost PSRR performance when needed. This combination allows the system to achieve both low power consumption and high PSRR performance by utilizing the complementary strengths of digital and analog LDO topologies.
3Reliability
If analog LDO is used to achieve high PSRR performance for RF applications, then power supply rejection ratio improves, but quiescent current consumption increases
Solution Approach 1:
The patent implements dynamic mode switching that activates the analog LDO only when high PSRR performance is required (such as during RF transmission periods), while the digital LDO handles normal low-power operations. This dynamic operation allows the system to achieve high PSRR performance on-demand without continuously consuming the higher quiescent current associated with analog LDO operation, thereby resolving the trade-off between PSRR performance and power consumption.
4Reliability
If separate LDO designs are implemented for different power domains, then specific application requirements are met, but the number of LDO circuits and design efforts multiply
Solution Approach 1:
The patent creates a multi-functional LDO platform that can serve multiple power domains and application types through configurable operation modes. By implementing a single LDO circuit that can be programmed to operate as digital LDO, analog LDO, or hybrid LDO, the design satisfies requirements for different power domains (IoT, RF, high-speed I/O) without multiplying the number of LDO circuits, thereby significantly improving design efficiency while maintaining application-specific performance.
Data Source
AI summary
An apparatus is provided which includes: a first set of devices which is digitally controlled by a first feedback loop that includes a first comparator; and a second set of devices which is controlled by an analog circuitry which is part of a second feedback loop that includes an amplifier, wherein the first set of devices is coupled in parallel to the second set of devices.