Programmable LDPC Encoder With Parallel Outer Code for Low Latency
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Low-density parity check (LDPC) codes require large memory buffers and computational power, especially for lengthy codes, and often have a high error floor, which can be challenging to reduce without increasing code block length, and existing solutions with outer systematic codes like Reed-Solomon or Bose-Chaudhuri-Hocquenghem codes result in high latency due to serial implementation.
Innovation Solution
Implementing LDPC encoders in combination with outer systematic codes, such as BCH codes, in a parallel manner within field-programmable gate arrays (FPGAs) or application-specific integrated circuits (ASICs), allowing for simultaneous processing of LDPC and outer code parity segments to reduce memory and latency requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If LDPC codes are implemented with large code block length to reduce error floor, then error correction performance is improved, but memory buffer requirements increase
Solution Approach 1:
The codeword is segmented into three distinct portions: message segment, outer code parity segment, and LDPC parity segment. This segmentation allows the encoder to process different portions independently and simultaneously, reducing the need for large memory buffers while maintaining the benefits of long code block lengths for error floor reduction.
Solution Approach 2:
The patent transitions from sequential processing to parallel processing by utilizing multiple dimensions of computation. The parity check matrix is decomposed into three portions that can be processed simultaneously in parallel, effectively adding a time dimension to the processing and reducing memory requirements.
2Reliability
If outer systematic codes are implemented in serial manner to lower error floor, then error correction performance is improved, but latency increases
Solution Approach 1:
The encoding process is segmented into three independent portions that can be executed in parallel: message segment processing, outer code parity generation, and LDPC parity generation. This eliminates the sequential dependency that causes latency in traditional serial implementations.
Solution Approach 2:
The patent merges the outer code encoding and LDPC encoding processes into a single parallel operation. Both encoders operate simultaneously on the same input message, producing their respective parity segments that are then combined to form the final codeword, significantly reducing latency.
3Adaptability or versatility
If LDPC encoders are made programmable to support wide range of parameters, then adaptability is improved, but memory buffer requirements increase
Solution Approach 1:
The encoder is designed with a universal architecture that can support a wide range of LDPC code parameters through programmability. The parity check matrix can be configured for different code rates, block lengths, and structures, making the same hardware resource adaptable to multiple coding standards without requiring separate dedicated memory buffers for each configuration.
Solution Approach 2:
The programmable parameters are segmented into configurable portions that can be set independently. The message portion, outer code parity portion, and LDPC parity portion can each be configured for different sizes and structures, allowing the encoder to adapt to various code specifications while maintaining efficient memory usage through the segmented processing approach.
Data Source
AI summary
Low-latency programmable encoders, and more particularly, low-latency programmable encoders which use low-density parity check (LDPC) codes in combination with an outer systematic code. The LDPC encoder is programmable for any irregular circulant-based LDPC code. The code profile, block length, number of block rows, and number of block columns can vary. The LDPC encoding and the outer systematic code encoding can proceed in a parallel manner (e.g., simultaneously) instead of in a serial manner.