Programmable Logic I/O for Multi-Level Signal Detection
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Solution Overview
Problem
Conventional programmable logic devices (PLDs) face challenges in generating and handling multi-level signals due to fixed output voltages determined by power rails, limiting the number of available voltage levels and requiring complex configurations like Open Drain (OD) to convert signals, which is undesirable for flexible operations.
Innovation Solution
Modify the input and output circuits of PLDs to include operational amplifiers coupled with programmable voltage generators and digital-to-analog converters, using R-2R resistor ladder networks to generate and detect multi-level signals, allowing for flexible and efficient signal transmission and reception.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conventional PLDs use fixed power rails to determine output voltage levels, then the device structure is simple, but the number of available voltage levels is limited and flexibility is reduced
Solution Approach 1:
The patent changes the fixed voltage parameter by introducing a digital-to-analog converter (DAC) that can generate multiple voltage levels dynamically. The DAC converts digital control signals into analog voltage levels, allowing the PLD to output signals at various voltage levels (e.g., 0V, 1.8V, 3.3V, 5V) instead of being constrained by fixed power rails. This enables flexible adaptation to different voltage requirements without changing the physical device structure.
Solution Approach 2:
The patent makes the PLD output circuit universal by designing it to handle multiple voltage levels and signal types through a single configurable output stage. The combination of the DAC and buffer amplifier creates a multi-functional output that can serve different voltage level requirements, replacing the need for multiple dedicated output circuits for different voltage levels.
2Adaptability or versatility
If PLDs require Open Drain (OD) configuration to convert output signals to different voltage levels, then voltage level conversion is possible, but the configuration becomes complex and operation is less flexible
Solution Approach 1:
The patent replaces the mechanical/configuration-based voltage level conversion (Open Drain with external pull-up resistors) with an electronic solution using a DAC and buffer amplifier. Instead of relying on external circuitry and specific configuration modes, the DAC electronically generates the required voltage levels internally, and the buffer amplifier provides direct drive capability. This substitution eliminates the need for OD configuration and external components, simplifying operation.
Solution Approach 2:
The patent introduces a buffer amplifier as an intermediary between the DAC output and the PLD output pin. This buffer amplifier mediates the transition from the low-impedance DAC output to the high-current-capability output pin, providing voltage level conversion and current buffering in a single integrated stage. This intermediary component simplifies the overall conversion process compared to OD configuration.
3Adaptability or versatility
If PLDs have limited power rail voltage levels available on the system board, then the device is easier to power, but the available output voltage levels are restricted
Solution Approach 1:
The patent segments the voltage generation function from the power rail structure. Instead of requiring multiple power rails to provide different voltage levels, the DAC segments the voltage generation into multiple discrete levels that can be selected digitally. This allows the PLD to generate multiple voltage levels from a single or few power rails, reducing the number of power rails needed while increasing output voltage flexibility.
Solution Approach 2:
The patent introduces dynamic voltage level selection through the DAC, which can change output voltage levels on-the-fly based on digital control signals. This dynamic capability allows the PLD to adapt output voltage levels in real-time without requiring multiple static power rails, making the system more adaptable with fewer power supply components.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables PLDs to transmit and receive multi-level signals with reduced pin count, increased flexibility, and simplified receiver logic, while maintaining cost-effectiveness by leveraging existing components like comparators and opamps.
Implementation Method 1
using R-2R resistor ladder networks to generate and detect multi-level signals
Implementation Method 2
an output buffer coupled to the digital-to-analog converter
Implementation Method 3
a pair of comparators, each comparator having a first input coupled to the input pin and a second input coupled to a corresponding programmable voltage generator
Data Source
AI summary
One aspect provides a programmable logic device. The device includes an input circuit for detecting a multi-level input signal and an output circuit. The input circuit includes: an input pin for receiving the multi-level input signal; first and second programmable voltage generators to generate, respectively, first and second multi-level voltage signals; a pair of comparators, each comparator having a first input coupled to the input pin and a second input coupled to a corresponding programmable voltage generator; and a logic gate coupled to the comparators, thereby facilitating the detection of the multi-level input signal based on outputs of the comparators. The output circuit includes a third programmable voltage generator to generate a third multi-level voltage signal, an output pin, and a voltage buffer coupling the third programmable voltage generator to the output pin, thereby facilitating the programmable logic device to output, over the output pin, the third multi-level voltage signal.