Programmable Microcontroller for Flexible Cryptographic Processing
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing cryptographic processing systems face challenges in flexibility and speed, as hardware cores are inflexible for protocol updates and require costly redesigns, while software cores are slow for high-speed security systems, necessitating a solution that balances flexibility and performance.
Innovation Solution
A cryptographic processor with a programmable microcontroller and configurable controllers for aligning, inserting, or removing data, which allows for protocol updates without new chip fabrication, combining hardware components with firmware programmability to manage encryption protocols internally.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If hardware cryptographic core architecture is used, then processing speed is improved, but flexibility to update protocols deteriorates
Solution Approach 1:
The patent implements a hybrid architecture where a hardware cryptographic core provides fast processing, while a programmable microcontroller dynamically configures and updates the hardware engine's operation. The microcontroller can load different cryptographic algorithms and parameters into the hardware engine, allowing protocol updates without physical hardware changes. This dynamic configuration capability resolves the contradiction by maintaining hardware-speed performance while adding software-like flexibility.
2Adaptability or versatility
If software cryptographic core architecture is used, then flexibility to update protocols is improved, but processing speed deteriorates
Solution Approach 1:
The patent introduces a programmable microcontroller as an intermediary between the software protocol specifications and the hardware cryptographic engine. The microcontroller translates high-level protocol requirements into hardware-specific configuration commands, allowing software-like flexibility in protocol updates while the hardware engine maintains high-speed cryptographic operations. This intermediary layer eliminates the need for direct software implementation of cryptographic functions, preserving processing speed.
3Adaptability or versatility
If hardware design is redesigned for protocol updates, then protocol flexibility is improved, but manufacturing cost and time increase
Solution Approach 1:
The patent segments the cryptographic system into three independent components: a fixed hardware cryptographic engine for fast processing, a programmable microcontroller for configuration and protocol management, and memory for storing protocol specifications. This segmentation allows protocol updates to be implemented by loading new firmware into the microcontroller and memory, completely avoiding the need for costly hardware redesign and re-fabrication. The fixed hardware engine continues to operate at full speed while the programmable components are updated through software.
Data Source
Figure 1
Figure 2
Figure 3
AI summary
Methods and systems provide flexibility to add new cryptographic protocols, while providing increased performance when compared to software cryptographic core architectures. They do so by loading new firmware or software into a microcontroller that interacts with various components of the architecture to program behavior of the components. Such systems provide a savings compared to the hardware cryptographic core architecture design due to the elimination of new chip re-fabrication requirements and a reduction in time-to-market. The systems also provide improved speed and throughput when compared to the software cryptographic core architecture. The firmware may be reprogrammed upon an enhancement or change to a protocol while still realizing the performance benefits. To this end, methods and systems may combine a microcontroller programmable by firmware, and flexible aligner, insertion and removal controllers that process and manage an incoming data stream.