Programmable Microcontroller Architecture for Non-Volatile Memory
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Solution Overview
Problem
Existing memory systems require complex and inflexible state machine designs for non-volatile memory operations, which slow down development and implementation due to the need for tape-out or engineering change orders for each design change.
Innovation Solution
A programmable and reprogrammable microcontroller architecture with multiple processors (Core Processor, Sense Processor, and Main Processor) that coordinates voltage sequences and tests conditions of non-volatile memory cells, allowing for flexible firmware updates without hardware changes, enabling efficient and parallel processing of memory operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a state machine design is used for non-volatile memory operations, then memory operations can be controlled, but the design becomes complex and inflexible requiring tape-out or engineering change orders for each design change
Solution Approach 1:
The patent applies the dynamics principle by transitioning from a static state machine design to a dynamic, programmable microcontroller architecture. The microcontroller can be reprogrammed through firmware updates to adapt to different memory operations and requirements without changing the underlying hardware architecture, enabling flexible adaptation while maintaining operational control.
Solution Approach 2:
The patent utilizes parameter changes by modifying the microcontroller's firmware parameters and instructions rather than changing the hardware structure. This allows the same physical device to perform different memory operations by updating software parameters, eliminating the need for tape-out or engineering change orders for each design modification.
2Productivity
If a state machine design is used for non-volatile memory operations, then memory operations can be controlled, but development and implementation slow down due to need for tape-out or engineering change orders
Solution Approach 1:
The microcontroller architecture enables rapid prototyping and iteration by allowing firmware updates without hardware changes. Developers can quickly implement new memory operations or fix bugs by simply updating the microcontroller's program memory, dramatically accelerating the development cycle compared to traditional state machine designs requiring tape-out for each change.
Solution Approach 2:
The patent applies the copying principle by using firmware software copies that can be easily replicated and updated. Instead of creating new hardware versions through tape-out, the same hardware platform can run different firmware versions, allowing rapid iteration and deployment of new features without physical hardware changes.
3Adaptability or versatility
If a programmable microcontroller architecture is used, then flexibility and rapid updates are enabled, but the architecture becomes more complex with multiple processors
Solution Approach 1:
The patent applies segmentation by dividing the microcontroller into specialized processor units (Main Processor, Core Processor, Sense Processor) with distinct functions. This modular segmentation allows each processor to handle specific tasks independently, making the overall system more manageable despite having multiple processors, while enabling flexible firmware updates in each module.
Solution Approach 2:
The microcontroller architecture embodies universality by designing a programmable platform where the same hardware can execute diverse memory operations through different firmware. The multi-processor design provides multi-functionality, allowing the system to handle various memory control tasks without requiring separate dedicated circuits for each function.
Data Source
AI summary
A non-volatile memory system comprises a memory structure and a control circuit connected to the memory structure. The control circuit includes a programmable and reprogrammable microcontroller. The microcontroller has a first processor that executes instructions to coordinate sequences of voltages applied to the memory structure by a first circuit in order to perform memory operations. The microcontroller has a second processor that executes second instructions to control a second circuit to test conditions of the non-volatile memory cells in response to the voltages applied to the memory structure. The microcontroller may have a third processor that controls the flow of the memory operation and directs the first and second processors to execute the instructions. The instructions of the various processors may be updated, which provides for flexible flow, core operation control, and condition testing.