User-Programmable NIC Packet Forwarding for Adaptive CPU Load Balancing
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Solution Overview
Problem
Conventional receive-side scaling (RSS) methods in network driver technologies lack flexibility and adaptability, leading to inefficiencies in distributing network traffic across multiple CPU cores, which can cause latency and suboptimal performance in computing systems.
Innovation Solution
Implementing user-configurable processing circuitry in the data path of a network interface controller (NIC) to dynamically distribute packets to CPU cores based on user-defined algorithms and hardware metadata, allowing for adaptive load balancing and reduced latency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conventional RSS methods are used, then packet distribution is achieved, but flexibility and adaptability are limited
Solution Approach 1:
The patent implements dynamic RSS by allowing the hash function configuration to change based on packet types and network conditions. The processing circuitry can be reprogrammed via PCIe configuration space to use different hash functions (e.g., TCP hash, UDP hash, or custom functions) depending on the traffic pattern, making the system adaptable rather than static.
Solution Approach 2:
The system changes parameters of the hash function based on packet characteristics. Different hash functions are selected based on protocol type (TCP, UDP, ICMP) and specific packet fields that need to be hashed. This parameter adaptation allows the same hardware to efficiently handle diverse traffic types without redesign.
2Adaptability or versatility
If user-configurable processing circuitry is added, then adaptability improves, but device complexity increases
Solution Approach 1:
The patent designs a universal processing circuitry that can perform multiple hash function types through configuration rather than hardware multiplication. A single programmable unit can execute different hash algorithms by loading appropriate instruction sequences, eliminating the need for dedicated hardware for each protocol type while maintaining full functionality.
Solution Approach 2:
The patent introduces configuration registers in the PCIe configuration space as an intermediary layer between the user software and the processing circuitry. Users can program the hash function behavior through standard PCIe configuration mechanisms without direct hardware access, simplifying the interface while enabling fine-grained control over packet distribution behavior.
3Productivity
If packets are distributed across multiple cores, then load balancing improves, but latency may increase due to additional processing
Solution Approach 1:
The patent performs hash calculation and queue selection in the NIC hardware before packets are transferred to the CPU. By pre-determining the destination queue using hardware-based hash functions and configuring the receive queues appropriately, the system eliminates the need for software-based distribution logic, reducing CPU involvement and overall latency.
Solution Approach 2:
The patent replaces software-based packet distribution mechanisms with hardware-based processing circuitry that performs hash calculations and queue mapping directly in the NIC. This substitution of mechanical/software operations with hardware operations significantly reduces processing time and latency while maintaining load balancing across multiple CPU cores.
Data Source
AI summary
A system for transmitting data is described, among other things. An illustrative system is disclosed to include one or more circuits to perform receive-side scaling (RSS) by receiving a packet, identifying one or more bits in the packet, and forwarding the packet to a receiving queue based on the identified one or more bits in the packet.