Programmable Offset Amplifier Front End With Wide Range, Low Noise
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Solution Overview
Problem
Prior art programmable offset amplifiers suffer from significant performance degradation, including noise, gain, bandwidth, and power performance issues when generating large input offset voltages, due to the need for substantial current imbalances and changes in transistor geometry ratios from optimal values.
Innovation Solution
A programmable offset amplifier design that allows for a large input offset voltage range without degrading noise, gain, or bandwidth performance by varying the relative sizes of composite input transistors without altering the balance of the total tail current, using a combination of current splitting and offset resistors to control offset voltages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If substantial current imbalances are used to generate large input offset voltages, then the input offset voltage range is improved, but noise performance and power efficiency deteriorate
Solution Approach 1:
The patent segments the tail current into multiple discrete current sources (first current source, second current source, third current source) that can be independently controlled. This segmentation allows precise control of current distribution to input transistors without requiring substantial current imbalances, thereby maintaining noise performance while achieving wide offset voltage range through programmable current allocation.
Solution Approach 2:
The patent implements dynamic control of tail current distribution through programmable current sources that can adjust current ratios in real-time. This dynamic allocation allows the system to achieve wide input offset voltage range by varying current ratios without maintaining fixed substantial imbalances, thus improving noise performance while preserving adaptability.
2Adaptability or versatility
If transistor geometry ratios are changed from optimal values to generate large input offset voltages, then the input offset voltage range is improved, but gain and bandwidth performance deteriorate
Solution Approach 1:
The patent changes the control parameter from fixed transistor geometry ratios to programmable current ratios. By maintaining optimal transistor geometries and instead varying current allocation dynamically, the system achieves wide input offset voltage range without degrading gain and bandwidth performance that would result from suboptimal geometry ratios.
3Adaptability or versatility
If substantial current imbalances are used to generate large input offset voltages, then the input offset voltage range is improved, but power dissipation increases
Solution Approach 1:
The patent implements self-service through programmable current allocation where the system automatically optimizes current distribution to achieve the desired offset voltage with minimum power consumption. By using multiple independently controlled current sources, the system can precisely allocate current without substantial imbalances, reducing power dissipation while maintaining wide offset voltage range capability.
Data Source
AI summary
A programmable offset amplifier includes first (M1) and second (M2) input transistors having differentially connected sources and gates coupled to first (Vin+) and second (Vin−) input voltages. A tail current (Itail1) is shared between the first and second input transistors. First (M3) and second (M4) load devices are coupled between a reference voltage and drains of the first and second input transistors, respectively. An output stage (13) has a first input (+) coupled to the drain of the second input transistor and a second input (−) coupled to the drain of the first input transistor. Programmable voltage changes are produced on input elements of programmable input offset circuitry to cause changes in offset voltages associated with electrodes of the input transistors which are reflected back to the amplifier input to provide a large programmable input-referred offset voltage.