Programmable Power-Up Sequencing for Power Gating Circuits

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Solution Overview

Problem

Existing power gating circuits in integrated circuits face challenges with dynamic IR drop, in-rush current, and power loss due to fixed power switch placement and routing topology, which are not optimal for all devices, leading to inefficient power consumption and chip operation.

Innovation Solution

A switched power fabric with sequentially coupled power switches and a control circuit that adjusts enable signals to control the ramp-up time and current characteristics, using daughter and mother switches to manage the power supply and mitigate IR drop and in-rush current, allowing for optimized power fabric design for specific circuits.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If power is gated to portions of integrated circuit to reduce power consumption, then power loss due to leakage is reduced, but dynamic IR drop and in-rush current problems occur during power-up

Engineering Contradiction:
Improvepower loss due to leakageVSAvoiddynamic IR drop and in-rush current
Core Design Contradiction:
Loss of energyVSObject-affected harmful factors

Solution Approach 1:

The power-up sequence is segmented into multiple phases by dividing the set of power switches into different groups (first set, second set, third set) that are activated sequentially. This segmentation allows controlled power distribution to different circuit blocks in stages, preventing simultaneous in-rush current to all blocks while maintaining power gating benefits for leakage reduction.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The control circuit performs preliminary actions by pre-configuring the power-up sequence before actual power delivery. The system determines optimal activation timing for each power switch group in advance, preparing the power distribution plan that prevents dynamic IR drop and in-rush current before they occur during the power-up phase.

Inventive Principle:
Principle #10Preliminary action

2Device complexity

If fixed power switch placement and routing topology are used, then device complexity is reduced, but power consumption efficiency and chip operation are compromised

Engineering Contradiction:
Improvepower switch placement and routing topologyVSAvoidpower consumption efficiency
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The system transitions from fixed power switch placement to a dynamic power-up sequence control mechanism. The control circuit adaptively determines the activation timing and sequence of power switches based on circuit requirements, allowing the power distribution topology to be dynamically optimized for each power-up event while maintaining manageable device complexity through systematic control.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The invention changes the temporal parameters of power switch activation rather than altering physical placement. By modifying the timing and sequence parameters of power delivery to different circuit blocks, the system achieves optimized power consumption efficiency without increasing physical device complexity, as the same hardware infrastructure is controlled with intelligent timing parameters.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20100219866A1Apparatus and Methods for Programmable Power-Up Sequence
Publication Date: 2010.09.02 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20100219866A1 patent drawing
  • US20100219866A1 patent drawing
  • US20100219866A1 patent drawing

AI summary

Circuits and methods for providing control of a power up sequence for supplying a gated power supply to a circuit portion. A power switch fabric is provided having more than two chains with more than two bits of control. The chains include power switches that are sequentially enabled in response to control signal to supply a virtual power supply to a gated circuit to support power gating. The power switches may include daughter switches and mother switches, where the mother switches are enabled later in time than the daughter switches. The enable signals to allow the virtual power supply to begin powering up may be timed to control the ramp up time, in rush current and peak current during the power up sequence of the virtual power supply. Methods for providing timing for the daughter and mother switches and enables to multiple chains in a power switch fabric are disclosed.