Programmable Semiconductor Structure for Scaled Device Reliability

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Challenges arise during the scaling-down process of semiconductor devices, impacting quality, yield, performance, and reliability, and increasing complexity.

Innovation Solution

A semiconductor device with a programmable structure comprising a substrate, a peripheral impurity region, a middle insulating layer, and a top electrode layer, configured to allow for changing electrical characteristics by tuning the device's status.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If semiconductor devices are scaled down to meet increasing computing demand, then computing ability is improved, but quality, yield, performance, and reliability deteriorate while complexity increases

Engineering Contradiction:
Improvecomputing abilityVSAvoiddevice reliability
Core Design Contradiction:
PowerVSReliability

Solution Approach 1:

The patent applies parameter changes by introducing a programmable structure that can alter its electrical characteristics through controlled doping processes. The middle insulating layer with varying thickness creates different resistance states, allowing the device to switch between conductive and insulating states, thereby maintaining reliability despite scaling down dimensions.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent implements dynamics through a programmable structure that can change its electrical state based on applied voltage. The middle insulating layer can be transitioned between different conductivity states through electrical programming, enabling the device to adapt its properties dynamically rather than being fixed during manufacturing.

Inventive Principle:
Principle #15Dynamics

2Power

If semiconductor devices are scaled down to meet increasing computing demand, then computing ability is improved, but device complexity increases

Engineering Contradiction:
Improvecomputing abilityVSAvoidstructure complexity
Core Design Contradiction:
PowerVSDevice complexity

Solution Approach 1:

The patent applies segmentation by dividing the semiconductor structure into distinct functional regions: a peripheral impurity region, a middle insulating layer with specific thickness, and a top electrode layer. This segmentation allows each component to perform its specific function independently, simplifying the overall design and manufacturing process while enabling complex programmable functionality.

Inventive Principle:
Principle #1Segmentation

3Reliability

If electrical characteristics are made adjustable through programmable structure, then quality and reliability are improved, but device complexity increases

Engineering Contradiction:
Improveelectrical characteristic stabilityVSAvoidprogrammable structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by pre-configuring the middle insulating layer with specific thickness variations and doping profiles during manufacturing. This preliminary structuring enables the device to be programmed into different electrical states through subsequent voltage application, rather than requiring complex real-time adjustments to the physical structure.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20260006857A1Semiconductor device with programmable structure and method for fabricating the same
Publication Date: 2026.01.01 NAN YA TECH
  • US20260006857A1 patent drawing
  • US20260006857A1 patent drawing
  • US20260006857A1 patent drawing

AI summary

The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a substrate; a peripheral impurity region positioned in the substrate; a top electrode layer positioned in the peripheral impurity region and protruding upwardly from the substrate; and a middle insulating layer inwardly positioned in the peripheral impurity region and partially surrounding the top electrode layer to separate the peripheral impurity region and the top electrode layer. The peripheral impurity region, the middle insulating layer, and the top electrode layer together configure a programmable structure.