Programmable Stage in Tile Buffer for Graphics Bandwidth Reduction
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Solution Overview
Problem
Tile-based graphics processing systems face high bandwidth costs for memory operations, particularly in lower power and portable devices, due to the need for frequent reads and writes between external memory and local memory, which contributes to power consumption and heat generation.
Innovation Solution
Incorporating a programmable processing stage within the graphics processing pipeline that allows direct reading and processing of data from the tile buffer, eliminating the need for storage and re-storage of fragment data in external memory, thereby reducing bandwidth consumption and enabling more efficient graphics processing operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If fragment data is stored in external memory and read back for processing, then graphics processing operations can be performed, but bandwidth consumption and power consumption increase
Solution Approach 1:
The tile buffer acts as an intermediary between the graphics processing pipeline and external memory. It stores rendered fragment data locally, allowing processing operations to be performed on data that remains in the buffer rather than being repeatedly read from and written to external memory, thereby reducing bandwidth consumption while maintaining processing capability
Solution Approach 2:
The system divides the graphics output into tiles, each with its own tile buffer. This segmentation allows independent processing of different tile regions, enabling selective access to only the portions of data that need processing rather than moving entire datasets to external memory, thus reducing overall bandwidth consumption
2Ease of operation
If frequent reads and writes between external memory and local memory are performed, then data can be accessed for processing, but power consumption and heat generation increase
Solution Approach 1:
The tile buffer stores rendered fragment data locally after the rendering pass, performing the action of keeping data ready for subsequent processing operations. This preliminary storage eliminates the need for frequent read-back operations from external memory during processing stages, reducing power consumption while maintaining ease of data access
Solution Approach 2:
The tile buffer serves as an intermediary memory layer between the graphics processing pipeline and external memory. It reduces the frequency of high-power external memory transactions by providing local storage for fragment data, thereby lowering overall power consumption while maintaining operational ease
3Productivity
If data is stored and re-stored in external memory, then processing operations can be performed, but system performance decreases due to external memory traffic
Solution Approach 1:
The tile buffer acts as an intermediary that retains fragment data locally throughout the processing pipeline. This eliminates repeated read-back operations from external memory, reducing the time spent on memory traffic while maintaining the ability to perform processing operations on the stored data
Solution Approach 2:
By keeping fragment data in the tile buffer continuously available for processing operations, the system maintains continuous useful action without interruption for external memory transactions. This continuous access pattern eliminates the start-stop nature of external memory read-back operations, improving system performance
Data Source
AI summary
A tile-based graphics processing pipeline comprising a rasteriser 3, a renderer 6, a tile buffer 10 configured to store rendered fragment data locally to the graphics processing pipeline prior to that data being written out to an external memory, a write out stage 13 configured to write data stored in the tile buffer to an external memory, and a programmable processing stage 14. The programmable processing stage 14 is operable under the control of graphics program instructions to read fragment data stored in the tile buffer 10 on a random access basis, perform a processing operation using the read fragment data, and write the result of the processing operation into the tile buffer 10 or to an external memory.