Programmed Defect Wafer Inspection Mode Selection

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Solution Overview

Problem

Current wafer inspection methods are inefficient in selecting the optimal detection mode for semiconductor devices due to limitations in noise data representation and variability in background patterns, leading to potential misses of critical defects and reduced yield.

Innovation Solution

A method that alters the design of dummy areas on production chips to include programmed defects, allowing for scanning with multiple optical modes to select the best detection mode, which is then used for wafer inspection, utilizing computer systems to automate the process and ensure accurate defect detection across various contexts and backgrounds.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If programmed defects are placed in test chips to find the best inspection mode, then mode selection is simplified, but the background pattern differences between test chips and production chips lead to inaccurate mode selection

Engineering Contradiction:
Improvemode selection processVSAvoiddefect detection accuracy
Core Design Contradiction:
Ease of operationVSMeasurement precision

Solution Approach 1:

The patent creates a copy of the production chip's background pattern (dummy pattern) and places it on a test wafer, then adds programmed defects to this copied background. This allows mode selection to be performed on a representative background pattern while still using programmed defects for systematic mode evaluation, resolving the conflict between ease of operation and measurement precision.

Inventive Principle:
Principle #26Copying

2Reliability

If multiple wafers are used to collect mode data to ensure all defect types are covered, then defect detection coverage is improved, but the time required for data collection increases significantly

Engineering Contradiction:
Improvedefect detection coverageVSAvoiddata collection time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent performs preliminary action by creating a comprehensive set of programmed defects covering all expected defect types, sizes, and shapes on a single test wafer with a representative background pattern. This preliminary preparation eliminates the need to collect data from multiple production wafers, significantly reducing data collection time while maintaining reliable defect detection coverage.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The test structure designed in the patent serves multiple functions simultaneously: it provides a representative production-like background pattern, contains a comprehensive array of programmed defects of various types, and enables systematic evaluation of multiple inspection modes. This multi-functionality consolidates what would otherwise require multiple separate wafers into a single universal test platform.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Measurement precision

If the shortest available wavelength is used for inspection, then resolution is improved, but the signal for certain defect types may not be optimal

Engineering Contradiction:
Improveinspection resolutionVSAvoiddefect detection signal
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The patent systematically varies inspection parameters including wavelength, numerical aperture, and polarization state when scanning the programmed defects. By evaluating multiple parameter combinations on the comprehensive defect array, the method identifies the optimal parameter set for each defect type, resolving the trade-off between resolution and detection signal reliability.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables faster and more reliable selection of optimal inspection modes, reducing the risk of missing critical defects and improving yield by accurately representing all types of pattern defects within the chip, thus enhancing the sensitivity and efficiency of wafer inspection systems.

Implementation Method 1

an optical subsystem configured to scan the dummy area of a wafer with two or more optical modes of the optical subsystem thereby generating output with one or more detectors of the optical subsystem for each of the two or more optical modes

Methodology Applied
Scientific EffectLight reflection: Reflection

Data Source

PatentUS9347862B2Setting up a wafer inspection process using programmed defects
Publication Date: 2016.05.24 KLA CORP
  • US9347862B2 patent drawing
  • US9347862B2 patent drawing
  • US9347862B2 patent drawing

AI summary

Methods and systems for setting up a wafer inspection process using programmed defects are provided. One method includes altering a design for a dummy area of a production chip such that printing of the dummy area on a wafer results in printing of a variety of defects. Two or more of the defects have different types, one or more different characteristics, different contexts in the design, or a combination thereof. The dummy area printed on a wafer may then be scanned with two or more optical modes of an inspection system to determine which of the optical mode(s) are better for defect detection. Additional areas of the wafer may then be scanned with the optical mode(s) that are better for defect detection to determine noise information. The noise information may then be used to select one or more of the optical modes for use in a wafer inspection process.