Programming Order for Multi-Level Analog Memory Cells

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Solution Overview

Problem

Existing memory devices face challenges in reducing cross-coupling interference and program disturb in multi-level analog memory cells, which affect the accuracy and reliability of data storage due to the order in which cells are programmed.

Innovation Solution

A method and system for programming multi-level analog memory cells that involve predefining a specific order for programming rows of cells, where cells in a given row are programmed only when neighboring rows are in an erased state, and the highest programming levels are set after all other levels are established, along with the ability to switch between different programming orders based on conditions such as the number of programming cycles or distortion levels.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If memory cells are programmed in arbitrary order, then programming speed is high, but cross-coupling interference and program disturb increase

Engineering Contradiction:

Improvedata storage accuracyVSAvoidprogramming speed

Core Design Contradiction:

ReliabilityVSProductivity

Solution Approach 1:

The patent applies preliminary action by programming cells in a specific sequence where neighboring rows are erased before programming the target row. This preliminary erasing of adjacent rows prevents cross-coupling interference from affecting the programming accuracy of current row cells, thereby improving data storage reliability without significantly compromising programming speed.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent segments the programming process into distinct phases: erasing neighboring rows first, then programming the target row. This segmentation allows the system to address cross-coupling interference systematically by isolating the programming operation from potential interference sources, thus improving reliability while maintaining acceptable programming throughput.

Inventive Principle:

Principle #1Segmentation

2Productivity

If highest programming levels are set first, then programming efficiency is improved, but distortion compensation capability is reduced

Engineering Contradiction:

Improveprogramming efficiencyVSAvoiddistortion compensation accuracy

Core Design Contradiction:

ProductivityVSMeasurement precision

Solution Approach 1:

The patent inverts the conventional programming approach by setting the highest programming levels last rather than first. This inversion allows the Program and Verify process to compensate for distortion more effectively, as the highest levels are programmed after the array state is more stable, improving measurement precision while maintaining reasonable programming efficiency.

Inventive Principle:

Principle #13The other way round (Inversion)

Solution Approach 2:

The patent applies preliminary action by establishing all non-highest programming levels before setting the highest levels. This preliminary establishment of lower levels creates a more stable baseline that enables better distortion compensation during the final highest-level programming operation, thereby improving measurement precision without significantly reducing overall programming efficiency.

Inventive Principle:

Principle #10Preliminary action

3Device complexity

If programming order is fixed, then process simplicity is maintained, but adaptability to changing memory conditions is reduced

Engineering Contradiction:

Improveprogramming control complexityVSAvoidadaptation to memory lifecycle conditions

Core Design Contradiction:

Device complexityVSAdaptability or versatility

Solution Approach 1:

The patent applies dynamics by making the programming order adaptive rather than fixed. The system dynamically adjusts the programming sequence based on real-time monitoring of memory array conditions, such as distortion levels and cell state. This dynamic adaptation allows the system to optimize performance throughout the memory lifecycle while maintaining manageable control complexity through automated decision-making algorithms.

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The patent implements feedback mechanisms that continuously monitor memory array conditions during operation. Based on this feedback, the system adjusts the programming order to adapt to changing conditions such as increasing distortion over time. This feedback-driven adaptation improves versatility while keeping control complexity manageable through systematic monitoring and response protocols.

Inventive Principle:

Principle #23Feedback

Data Source

PatentUS8174905B2Programming orders for reducing distortion in arrays of multi-level analog memory cells

Publication Date: 2012.05.08 APPLE INC

AI summary

A method for data storage includes predefining an order of programming a plurality of analog memory cells that are arranged in rows. The order specifies that for a given row having neighboring rows on first and second sides, the memory cells in the given row are programmed only while the memory cells in the neighboring rows on at least one of the sides are in an erased state, and that the memory cells in the given row are programmed to assume a highest programming level, which corresponds to a largest analog value among the programming levels of the cells, only after programming all the memory cells in the given row to assume the programming levels other than the highest level. Data is stored in the memory cells by programming the memory cells in accordance with the predefined order.