Programmable Logic Macro Cells for IP Security
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Solution Overview
Problem
Current logic design protection methods, such as logic locking and logic redaction, face challenges in maintaining IP confidentiality due to high area overhead and vulnerability to structural attacks, particularly Structural Analysis using Machine Learning (SAIL).
Innovation Solution
The introduction of Programmable Logic Macro (PROM) cells with customizable functions, multiplexers, and configuration bits, which allow for obfuscation of circuit designs by using dummy inputs and optimizing transistor-level design to reduce area consumption while enhancing security against state-of-the-art attacks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If logic locking or logic redaction is used to protect IP confidentiality, then security is improved, but area overhead increases and vulnerability to structural attacks remains
Solution Approach 1:
The circuit is divided into multiple segments with different security levels. Critical functions are protected using PROM cells with configuration bits, while non-critical functions use standard logic. This segmentation allows selective application of protection mechanisms, reducing overall area overhead while maintaining security for essential IP.
Solution Approach 2:
The PROM cell structure serves multiple functions: it acts as a programmable logic element, a security protection mechanism, and a configuration storage unit. The same cell can implement different logic functions by changing configuration bits, eliminating the need for separate protection circuits and reducing area overhead.
2Reliability
If logic locking or logic rediction is used to protect IP confidentiality, then security is improved, but vulnerability to structural attacks (SAIL) increases
Solution Approach 1:
The circuit implements dynamic behavior through configuration bits that can be programmed to create different logic functions and interconnection patterns. This dynamic reconfigurability makes static structural analysis attacks ineffective, as the actual logic function may differ from the fabricated structure due to configuration settings.
Solution Approach 2:
Configuration bits act as an intermediary layer between the physical structure and the actual logic function. This intermediary obscures the relationship between the fabricated circuit structure and the intended IP functionality, preventing attackers from directly inferring the original design from structural analysis.
3Adaptability or versatility
If PROM cells with customizable functions are used, then adaptability is improved, but device complexity increases
Solution Approach 1:
The PROM cell merges multiple components into a single integrated structure: lookup tables for logic implementation, configuration bit registers for programming, and multiplexers for function selection. This consolidation provides high adaptability while managing complexity through unified cell design rather than separate components.
Solution Approach 2:
The PROM cell allows parameter changes through configuration bits that control the behavior of internal multiplexers and logic functions. By changing these parameters (configuration bit values), the same physical cell can implement different logic functions, providing adaptability without requiring physical reconfiguration or additional complex structures.
Data Source
AI summary
Methods and system are provided for designing a programmable circuitry. The method may generate a cell library with custom multi-input and multi-output configurable logic cells and introduce such in a netlist design. The methods may increase the configuration and diversity of cells to increase the security of the underlying design. The methods may to randomize the interconnects by changing a set of cells used. The methods may integrate any of the steps with electronic design automation (EDA) synthesis tools.