Proof Core Identification for Accurate Formal Verification Coverage
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Solution Overview
Problem
Existing formal verification coverage metrics overestimate the test coverage of circuit designs, misleading designers into believing that the current property set is sufficient, when in fact it is not, leading to potential flaws in the design going undetected.
Innovation Solution
The method involves identifying a proof core within the cone of influence of a circuit design, which is a minimally sufficient portion capable of proving the correctness of a property, and using this proof core to generate a more accurate coverage metric, allowing designers to assess the true level of formal verification coverage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If existing coverage metrics are used to measure formal verification coverage, then the measurement process is simple, but the measurement precision is inaccurate and overestimates the true coverage
Solution Approach 1:
The verification system is segmented into distinct functional modules: a coverage metric generation module that creates initial metrics, a proof core identification module that extracts relevant circuit portions, and a coverage metric adjustment module that refines the metrics. This segmentation allows each module to specialize in a specific task, improving overall measurement precision while managing system complexity through modular architecture.
Solution Approach 2:
The proof core acts as an intermediary between the circuit design and the coverage metric evaluation. By identifying and isolating the proof core (the minimal subset of circuit elements that determine property correctness), the system uses this intermediary to bridge the gap between complex circuit behavior and simplified coverage measurement, thereby improving accuracy without proportionally increasing overall system complexity.
2Measurement precision
If the entire cone of influence is used to generate coverage metrics, then the coverage metric generation is straightforward, but the metrics overestimate the actual verification coverage
Solution Approach 1:
The system extracts the proof core from the larger cone of influence by identifying and removing redundant circuit elements that do not contribute to property correctness. This extraction process isolates only the essential components needed for verification, enabling more accurate coverage metric generation while providing a systematic method to handle the complexity of identifying critical circuit portions.
Solution Approach 2:
Instead of treating the entire cone of influence uniformly, the system applies local quality by differentiating between critical and non-critical circuit elements within the cone. The proof core identification process assigns different importance levels to various sub-regions, focusing measurement efforts on the locally critical proof core while reducing the weight or ignoring non-essential portions, thereby improving metric accuracy.
3Reliability
If formal verification is performed on complex circuit designs, then the verification thoroughness increases, but the verification time increases significantly
Solution Approach 1:
The system performs preliminary action by identifying the proof core before executing full formal verification. By pre-processing the circuit design to isolate the minimal subset of elements that determine property correctness, the system prepares a simplified verification target that maintains reliability while reducing the computational burden and time required for the actual verification process.
Solution Approach 2:
The system applies partial action by focusing verification efforts on the proof core rather than the entire circuit design. This selective approach performs verification only on the essential elements that affect property correctness, achieving sufficient verification reliability without the excessive time cost of verifying the complete circuit, thereby optimizing the balance between thoroughness and efficiency.
Data Source
AI summary
A computer-implemented method and non-transitory computer readable medium for circuit design verification. Formal verification is performed on a circuit design to prove a correctness of a property of the circuit design. The circuit design has a cone of influence representing a portion of the circuit design capable of affecting signals of the property. A proof core of the circuit design is identified, the proof core being a portion of the cone of influence that is sufficient to prove the correctness of the property. A coverage metric is generated that is indicative of a level of formal verification coverage provided by the property based on the proof core of the circuit design.