Protected Current-Mirror Level Shifter for Wide-Voltage High-Speed I/O
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Solution Overview
Problem
Existing voltage level shifter circuits in integrated circuits (ICs) are highly dependent on input signal voltage levels, power supply voltage ranges, and I/O operating frequencies, particularly in low voltage and high-speed designs, leading to performance variability across different applications and designs.
Innovation Solution
A level shifter circuit comprising a protection stage, a current mirror stage, and an input stage, with a capacitor connected between the input stage and the current mirror stage, which isolates transistors operating at low voltage from those operating at high voltage and maintains performance across a wide range of power supply voltages and frequencies, ensuring optimized performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a conventional level shifter circuit is used to translate voltage levels between different power supply domains, then voltage level translation is achieved, but the circuit performance becomes highly dependent on I/O signal voltage levels, power supply voltage ranges, and I/O operating frequencies
Solution Approach 1:
The level shifter circuit is divided into distinct functional stages: an input stage operating at the first voltage level, a protection stage operating at the second voltage level, and an output stage operating at the second voltage level. This segmentation allows each stage to be optimized for its specific voltage domain, improving overall performance consistency across different operating conditions.
Solution Approach 2:
A protection circuit stage is introduced as an intermediary between the input stage and output stage. This protection stage, operating at the second voltage level, acts as a buffer that isolates the input stage from voltage variations and load effects, thereby stabilizing the circuit performance across wide voltage ranges and frequencies.
2Use of energy by moving object
If the internal core supply voltage is kept low to minimize power consumption and adhere to process node requirements, then power efficiency is improved, but the ability to interface with high voltage I/O circuits is compromised
Solution Approach 1:
The circuit is segmented into low-voltage core domains and high-voltage I/O domains, with dedicated voltage level translation paths. This allows the core to operate at low voltage for power efficiency while I/O circuits can operate at higher voltages for compatibility with external devices.
Solution Approach 2:
The protection stage operating at the second voltage level serves as an intermediary that enables safe interfacing between low-voltage core circuits and high-voltage I/O circuits, allowing the core to maintain low operating voltage while still supporting high-voltage I/O operations.
3Device complexity
If transistors are directly coupled between low voltage input and high voltage output without isolation, then circuit complexity is reduced, but performance deteriorates at high frequencies due to voltage range mismatches
Solution Approach 1:
The circuit is divided into frequency-optimized stages: the input stage is optimized for high-frequency signal reception at the first voltage level, while the protection and output stages are optimized for signal driving at the second voltage level. This segmentation enables high-frequency operation without excessive complexity.
Solution Approach 2:
The protection stage acts as an intermediary that isolates the high-frequency input signals from the voltage level and loading effects of the output stage, allowing each stage to be optimized for its specific function without degrading overall high-frequency performance.
Data Source
AI summary
A high-speed, area-efficient level shifter includes transistors having a variety of oxide thicknesses. The level shifter has a protection circuit stage, and a current mirror stage that allows the level shifter to perform over a wide voltage range at a high frequency. The level shifter maintains rise time, fall time, and duty cycle over a wide range of input and output voltage levels.