Protected Memory Regions for PCIe Device Access Control
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Solution Overview
Problem
Modern computing systems with multiple subsystems, such as SmartNIC and SmartIO controllers, face security vulnerabilities due to unrestricted or under-controlled access to system memory, which can lead to threats as these subsystems have similar computational capabilities to the main CPU and share memory spaces without adequate oversight.
Innovation Solution
Implementing protected or restricted memory regions within the system memory, where access is managed based on device identifiers and process/thread identifiers, using memory fencing and access doors to control and secure memory transactions, ensuring only authorized devices and processes can access specific memory areas.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If subsystems are provided with direct access to system memory, then computational capabilities and task offloading are enhanced, but security vulnerabilities increase due to unbounded and under-controlled access
Solution Approach 1:
The system memory is segmented into protected memory regions with distinct access permissions. Each region is associated with specific device identifiers and process identifiers, creating isolated security zones that allow subsystems to access only authorized memory areas while maintaining overall system security.
Solution Approach 2:
An intermediary access control mechanism is introduced between subsystems and system memory. This intermediary validates device identifiers and process identifiers against stored permission information, mediating memory access requests to prevent unauthorized access while allowing legitimate computational operations.
2Ease of operation
If unrestricted access to system memory is allowed, then ease of operation is improved, but reliability deteriorates due to lack of oversight
Solution Approach 1:
Access permissions are established in advance by storing device identifiers and process identifiers associated with protected memory regions before access occurs. This preliminary configuration enables automatic access control validation without interfering with the ease of operation during actual memory access operations.
Solution Approach 2:
The system implements self-service access control where the access control logic automatically validates device identifiers and process identifiers against stored permission information. This automated self-validation maintains ease of operation while ensuring reliability through consistent security enforcement without requiring manual oversight.
3Reliability
If protected memory regions with access control are implemented, then security is enhanced, but device complexity increases due to additional access control mechanisms
Solution Approach 1:
Access control is applied locally to specific memory regions rather than globally to the entire memory space. Each protected memory region has its own device identifier and process identifier associations, allowing security to be enforced only where needed while leaving other memory areas accessible without restriction, thereby reducing overall system complexity.
Data Source
AI summary
In exemplary aspects described herein, system memory is secured using protected memory regions. Portions of a system memory are assigned to endpoint devices, such as peripheral component interconnect express (PCIe) compliant devices. The portions of the system memory can include protected memory regions. The protected memory regions of the system memory assigned to each of the endpoint devices are configured to control access thereto using device identifiers and/or process identifiers, such as a process address space ID (PASID). When a transaction request is received by a device, the memory included in that request is used to determine whether it corresponds to a protected memory region. If so, the transaction request is executed if the identifiers in the request match the identifiers for which access is allowed to that protected memory region.