Protected Conductive Pad Structure for Low-Temperature Via Formation

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Solution Overview

Problem

In semiconductor device packaging, exposed conductive pads are prone to contamination and oxidation, leading to reliability issues and pick-and-place accuracy problems during manufacturing, and existing methods require complex cleaning processes and high-temperature operations for via formation.

Innovation Solution

A semiconductor device package design featuring conductive pads covered by organometallic protection layers, which are embedded in the substrate and separated from filling materials by these layers, preventing contamination and oxidation, and allowing for easy via formation through thermal decomposition at lower temperatures.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conductive pads are left exposed for electrical connection, then electrical connectivity is achieved, but the pads are prone to contamination and oxidation leading to reliability issues

Engineering Contradiction:
Improvereliability of conductive padsVSAvoidcontamination and oxidation of conductive pads
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

An organometallic protection layer is introduced as an intermediary substance between the conductive pad and the external environment. This protection layer prevents direct contact between the conductive pad and contaminants or oxidizing agents, thereby eliminating the harmful effects of contamination and oxidation while maintaining electrical connectivity through the embedded structure.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The conductive pad is pre-protected by embedding it within the substrate before exposure to the external environment. This preliminary protective action prevents contamination and oxidation from occurring in the first place, rather than requiring subsequent cleaning or repair operations.

Inventive Principle:
Principle #9Preliminary anti-action

2Ease of manufacture

If complex cleaning processes and high-temperature operations are used for via formation, then via formation is achieved, but the manufacturing process becomes more complex and costly

Engineering Contradiction:
Improveease of via formationVSAvoidcomplexity of manufacturing process
Core Design Contradiction:
Ease of manufactureVSDevice complexity

Solution Approach 1:

The manufacturing approach changes the temperature parameter from high-temperature operations to lower-temperature processes. The organometallic protection layer enables via formation at reduced temperatures, simplifying the manufacturing process and reducing equipment requirements while achieving the same functional result.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The complex cleaning processes and high-temperature operations are extracted from the manufacturing workflow. By using the organometallic protection layer, these unnecessary complex steps are eliminated, leaving a simplified process that achieves via formation more efficiently.

Inventive Principle:
Principle #2Taking out (Extraction)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design enhances the reliability of semiconductor device packages by preventing contamination and oxidation of conductive pads, simplifies the manufacturing process, and reduces the risk of component misplacement during assembly, while enabling cost-effective and efficient via formation.

Implementation Method 1

The first protection layer covers an external surface of the first conductive pad... preventing contamination and oxidation

Methodology Applied
Scientific EffectOxidation prevention: Oxidation

Implementation Method 2

allowing for easy via formation through thermal decomposition at lower temperatures

Methodology Applied
Scientific EffectThermal decomposition: Thermolysis

Data Source

PatentUS11830834B2Semiconductor device, semiconductor device package and method of manufacturing the same
Publication Date: 2023.11.28 ADVANCED SEMICON ENG INC
  • US11830834B2 patent drawing
  • US11830834B2 patent drawing
  • US11830834B2 patent drawing

AI summary

A semiconductor device, a semiconductor device package, and a method of manufacturing a semiconductor device package are provided. The semiconductor device includes an electronic component and a first protection layer. The electronic component includes a first conductive pad protruded out of a first surface of the electronic component. The first protection layer covers an external surface of the first conductive pad. The first surface of the electronic component is exposed from the first protection layer.