Protection Control Device Synchronization Circuit

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

In protection relay systems using a process bus, discontinuous sampling cycles can occur when synchronization signals are switched between IEDs, leading to the generation of digital data with different sampling cycles, which can prevent protection operations until digital data is reaccumulated, causing protection to be stopped.

Innovation Solution

A protection control apparatus with a control-signal output circuit that generates sampling signals synchronized with external synchronization signals, using a number-of-clocks calculating circuit to calculate differences in clock cycles and a synchronization control unit to synchronize sampling signal timing, ensuring continuous protection by controlling sampling cycles.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If synchronization signals are transmitted from IEDs to MUs for AD conversion, then sampling synchronization is achieved, but when IEDs are switched due to abnormality, the sampling cycle becomes discontinuous causing protection to stop

Engineering Contradiction:
Improveprotection operation continuityVSAvoidsampling cycle consistency
Core Design Contradiction:
ReliabilityVSStability of the object's composition

Solution Approach 1:

The MU performs preliminary actions by continuously monitoring the reception status of synchronization signals from multiple IEDs and pre-switching to backup IEDs before complete failure occurs. The system maintains ready-to-use synchronization signal paths and switches seamlessly when abnormalities are detected, preventing sampling cycle discontinuity and ensuring continuous protection operations.

Inventive Principle:
Principle #10Preliminary action

2Measurement precision

If digital data is reaccumulated after sampling cycle discontinuity, then synchronization is restored, but protection operation is stopped during accumulation time

Engineering Contradiction:
Improvesampling synchronization accuracyVSAvoidprotection operation interruption time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The system maintains continuous useful action by implementing redundant synchronization signal paths from multiple IEDs. When one IED becomes abnormal, the MU seamlessly switches to another IED's synchronization signal without interrupting the sampling process. This eliminates the need for data reaccumulation and ensures continuous protection operation while maintaining sampling synchronization accuracy.

Inventive Principle:
Principle #20Continuity of useful action

3Reliability

If multiple IEDs are used for redundancy, then protection reliability is improved, but synchronization signal cycle mismatch occurs when switching between IEDs

Engineering Contradiction:
Improveprotection system redundancyVSAvoidsynchronization signal management complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The MU acts as an intermediary that manages synchronization signals from multiple IEDs. It monitors the synchronization signal cycles from each IED, detects abnormalities, and seamlessly switches between IEDs while maintaining consistent sampling cycles. This intermediary function simplifies the overall system by centralizing synchronization management in the MU, allowing multiple IEDs to provide redundancy without increasing synchronization management complexity at the IED level.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentEP2768101B1Protective control device
Publication Date: 2018.05.30 MITSUBISHI ELECTRIC CORP
  • EP2768101B1 patent drawingFigure 1
  • EP2768101B1 patent drawingFigure 2
  • EP2768101B1 patent drawingFigure 3

AI summary

A protection control apparatus includes a control-signal output circuit 21 configured to generate a sampling signal 32a in synchronization with a 1 PPS signal 42 and output, as a control signal 21 a, data numbers 32b cyclically counted up every time the sampling signal 32a is generated and the sampling signal 32a and a data output unit 50 configured to convert a system electrical quantity into digital data 15a based on the control signal 21 a output from the control-signal output circuit 21 and output the digital data 15a. The control-signal output circuit 21 includes a number-of-clocks calculating circuit 38 configured to calculate a second number of clocks P1 and a third number of clocks P2 and a synchronization control unit 39 configured to calculate a difference between a first number of clocks P and a second number of clocks P1, control a cycle of the sampling signal 32a based on the difference and the third number of clocks P2, and synchronize generation timing of the sampling signal 32a with the 1 PPS signal 42.