Protection Transistor Biasing for Power-Down Node Overvoltage

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Solution Overview

Problem

Integrated circuits face the challenge of protecting transistors from voltages exceeding their withstand voltage, both in normal and power down modes, which can lead to non-functional operation or damage.

Innovation Solution

A device incorporating a structure with protection transistors that are turned off in normal mode and turned on in power down mode to provide protection voltages to critical nodes, ensuring transistors are not exposed to excessive voltages.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If protection transistors are added to protect elements from excessive voltage in power down mode, then reliability is improved, but device complexity increases

Engineering Contradiction:
Improveprotection from excessive voltageVSAvoidcircuit structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The protection transistor is designed to serve multiple functions: in normal mode, it operates as a regular transistor contributing to circuit operation, while in power down mode, it automatically activates to provide voltage protection. This multi-functionality eliminates the need for separate protection circuits, thereby improving reliability without significantly increasing device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The protection transistor dynamically changes its state based on the operating mode. It is turned off during normal operation to avoid interference with circuit functionality, and turned on during power down mode to provide protection. This dynamic behavior is controlled through biasing schemes that respond to power down signals, allowing the same transistor to adapt its function based on operational conditions.

Inventive Principle:
Principle #15Dynamics

2Reliability

If protection transistors are turned on in power down mode, then protection capability is improved, but area occupied increases

Engineering Contradiction:
Improveprotection capabilityVSAvoidcircuit area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The protection transistor shares the same physical space and functional role with regular transistors in the circuit. By designing the protection transistor to be identical in structure and size to other transistors in the circuit, no additional area is required beyond what is already allocated for transistor elements. The protection function is achieved by repurposing existing transistor structures rather than adding dedicated protection components.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If protection transistors are added to maintain transistor margins, then reliability is improved, but device complexity increases

Engineering Contradiction:
Improvetransistor marginsVSAvoidcircuit structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The protection transistor is pre-configured with appropriate biasing and connection arrangements so that when activated in power down mode, it automatically provides the necessary voltage clamping and protection. The biasing circuits are designed in advance to ensure the protection transistor turns on at the correct potential levels, maintaining proper transistor margins without requiring complex real-time control mechanisms.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20250221056A1Device including structure for protecting elements in power down mode
Publication Date: 2025.07.03 SAMSUNG ELECTRONICS CO LTD
  • US20250221056A1 patent drawing
  • US20250221056A1 patent drawing
  • US20250221056A1 patent drawing

AI summary

A device includes: a plurality of first transistors included in a first current path, in a normal mode, between a first power node to which a positive supply voltage is configured to be applied and a second power node to which a negative supply voltage is configured to be applied; and a first protection transistor connected to a first node which two of the plurality of first transistors are connected to, wherein the first protection transistor is configured to be turned off in the normal mode and to be turned on to provide a protection voltage to the first node in a power down mode.