Protective Adhesive Planarization for Semiconductor Chip Stacking
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Solution Overview
Problem
In semiconductor chip stacking, surface unevenness due to wiring density differences leads to voids when resin fills the gap between chips, reducing reliability and yield in semiconductor packages.
Innovation Solution
A method involving the formation of a protective adhesive that covers electrodes and wiring layers, facilitating flat attachment and peeling of a supporting substrate, and subsequent resin filling between chips without voids, using non-photosensitive polyimide for the adhesive to prevent gas generation during heat treatment.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multi-layer redistribution layer structure is formed, then wiring density and functionality are improved, but surface unevenness increases causing voids in resin filling
Solution Approach 1:
A planarization layer is introduced as an intermediary between the multi-layer RDL structure and the resin filling process. This planarization layer compensates for the surface unevenness created by the dense wiring structure, providing a flat surface that prevents void formation during resin filling while maintaining the high wiring density underneath.
Solution Approach 2:
The surface topology parameter is changed by adding a planarization layer that transforms the uneven surface profile into a flat surface. This parameter change resolves the conflict between maintaining high wiring density (which creates unevenness) and achieving surface flatness (required for proper resin filling).
2Reliability
If additional adhesive layers are added to compensate for unevenness, then resin filling reliability is improved, but device complexity and manufacturing steps increase
Solution Approach 1:
The planarization layer is designed to serve multiple functions simultaneously: it provides surface planarization to prevent voids, acts as an adhesive layer to bond the RDL structure to the substrate, and offers mechanical support. By combining these functions in a single layer, the patent avoids adding extra adhesive layers while maintaining reliability.
Solution Approach 2:
The planarization function and adhesive function are merged into a single planarization layer. This eliminates the need for separate adhesive layers that would otherwise be required to compensate for surface unevenness, thereby reducing device complexity while maintaining resin filling reliability.
3Strength
If photosensitive adhesive is used, then adhesion strength is improved, but gas generation during heat treatment reduces reliability
Solution Approach 1:
The chemical composition parameter of the adhesive layer is changed by selecting a non-photosensitive adhesive material that does not contain photo initiators. This parameter change eliminates gas generation during heat treatment while maintaining adequate adhesion strength through alternative curing mechanisms or material properties.
Solution Approach 2:
The patent converts the potential harm of photosensitive materials (gas generation during heat treatment) into a benefit by selecting non-photosensitive adhesive materials. This eliminates the harmful gas generation effect while achieving the desired adhesion through different material properties and curing methods.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Ensures reliable resin filling between semiconductor chips, preventing voids and enhancing package reliability by planarizing the surface and serving as both protective and adhesive layers, eliminating the need for additional adhesives.
Implementation Method 1
providing a protective adhesive that covers the first electrode and the second wiring layer; bonding a supporting substrate onto the protective adhesive
Implementation Method 2
using non-photosensitive polyimide for the adhesive to prevent gas generation during heat treatment
Implementation Method 3
polishing a second surface of the substrate opposite to the first surface
Data Source
AI summary
According to one embodiment, a method of manufacturing a semiconductor device includes: forming a semiconductor feature on a first surface of a substrate; forming a first insulating film on the semiconductor feature; forming a first wiring layer on the first insulating film; forming a second insulating film on the first wiring layer; forming a second wiring layer on the second insulating film; forming a first electrode on the second wiring layer; providing a protective adhesive that covers the first electrode and the second wiring layer; bonding a supporting substrate onto the protective adhesive; polishing a second surface of the substrate opposite to the first surface; removing the supporting substrate from the protective adhesive; and removing at least a portion of the protective adhesive to expose the first electrode.