Protective Circuit for ESD Surge Management
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Solution Overview
Problem
Existing ESD protective circuits for electronic devices are inadequate in managing surge currents during electrostatic discharge, leading to potential transistor breakdown and reduced reliability.
Innovation Solution
A protective circuit design incorporating a first and second power supply line, a signal line, diodes, resistors, capacitors, and inverters, with specific transistor configurations to manage surge currents and clamp voltages, ensuring effective discharge and maintaining transistor integrity during ESD events.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional ESD protective circuits are used, then basic ESD protection is provided, but surge current management is inadequate leading to transistor breakdown
Solution Approach 1:
The patent introduces a protective circuit as an intermediary component between the ESD event and the transistor. This protective circuit includes a first transistor connected in parallel with the second transistor, where the first transistor has a higher breakdown voltage. When surge current occurs, the protective circuit activates to divert and manage the surge current through the first transistor, preventing direct damage to the second transistor while maintaining normal circuit operation.
2Object-affected harmful factors
If transistor breakdown voltage is increased to resist surge currents, then ESD protection is improved, but normal circuit operation may be affected
Solution Approach 1:
The patent segments the protection function into two separate transistors with different characteristics. The first transistor (protective) has high breakdown voltage to handle surge currents, while the second transistor (operational) has lower breakdown voltage for normal operation. This segmentation allows each transistor to be optimized for its specific function without compromising the other.
Solution Approach 2:
The protective circuit dynamically switches between normal operation mode and surge protection mode. During normal operation, the second transistor operates normally with its lower breakdown voltage characteristic. When surge current exceeds a threshold, the protective circuit activates and the first transistor takes over to handle the surge, effectively changing the circuit's operational state to protect against damage.
3Reliability
If parallel transistor configuration is used for surge current discharge, then ESD protection is enhanced, but device complexity increases
Solution Approach 1:
The patent merges the protective function with the existing circuit structure by integrating the first transistor in parallel with the second transistor. Both transistors share common connection points and control signals, allowing the protective function to be combined with the operational function in a unified circuit architecture rather than adding completely separate protection systems.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The circuit effectively discharges surge currents to a second power supply line, reducing clamp voltage and increasing transistor breakdown voltage, thereby enhancing the reliability and protection of electronic circuits against electrostatic discharge.
Implementation Method 1
An ESD protective circuit is used to improve ESD protection of the electronic circuit
Implementation Method 2
A first diode has a cathode connected to the first line and an anode connected to the signal line. A second diode has a cathode connected to the signal line and an anode connected to the second line
Implementation Method 3
A first resistor and a first capacitor are connected in series between the first line and the second line
Implementation Method 4
A first inverter has an input side connected to a node between the first resistor and the first capacitor. A second inverter has an input side connected to an output side of the first inverter. A third inverter has an input side connected to an output side of the second inverter
Data Source
AI summary
A protective circuit includes a first line, a second line, and a signal line. A first and second diode are connected in series between the first and second lines. A resistor and a capacitor are connected between the first and second lines. A first inverter, a second inverter, a third inverter are connected in series between a node between the resistor and capacitor and a gate of a first transistor. A third diode is connected between the first and second lines. The first transistor is connected between the first and second lines. A second transistor is connected between the first line and a protected circuit. A gate of the second transistor is connected to the output of the first inverter. A third transistor is connected between the second line and the protected circuit. A gate of the third transistor is connected to output of the second inverter.