Protective Layer Buffer Zone for Printed Electronic Yield
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Solution Overview
Problem
The yield of printed electronic devices, particularly those with memory cells, is reduced due to various fabrication process factors, and existing protective layers that maximize coverage are costly and may not significantly impact yield.
Innovation Solution
The use of a protective layer that covers electrode traces with a buffer zone extending beyond their edges, while leaving uncovered portions of the contact pads to minimize material usage and prevent wicking, results in improved yield and reduced costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a protective layer maximizes coverage over all electrode structures including contact pads, then protection is improved, but material usage and cost increase
Solution Approach 1:
The protective layer is applied selectively to different regions with different coverage requirements. The first protective layer covers the electrode traces with a buffer zone extending beyond their edges, while the contact pads have uncovered portions. This local differentiation optimizes protection where needed (electrode traces) while reducing material usage where full coverage is not required (contact pads), directly resolving the contradiction between protection and material usage.
2Reliability
If a protective layer provides maximum coverage, then protection is improved, but manufacturing cost increases
Solution Approach 1:
The protective layer configuration applies maximum coverage to electrode traces that require protection from environmental factors and mechanical damage, while leaving contact pads partially uncovered where such protection is less critical. This localized approach reduces the total quantity of protective material required, thereby reducing manufacturing cost while maintaining adequate protection for the most vulnerable components.
3Quantity of substance
If protective layer coverage is reduced to minimize material usage, then material usage is reduced, but protection may be compromised
Solution Approach 1:
The invention identifies that electrode traces require maximum protection due to their vulnerability to environmental degradation and mechanical damage, while contact pads can tolerate reduced coverage. The protective layer is configured to provide a buffer zone extending beyond electrode trace edges, ensuring comprehensive protection where needed, while uncovered portions of contact pads reduce material usage. This selective coverage strategy maintains protection reliability for critical components while optimizing material efficiency.
4Ease of manufacture
If the protective layer covers all areas uniformly, then manufacturing simplicity is improved, but yield is reduced due to wicking issues
Solution Approach 1:
The protective layer configuration creates different coverage zones: full coverage with buffer zones over electrode traces to prevent wicking and environmental damage, and reduced coverage over contact pads to eliminate wicking issues at the interface between the protective layer and contact pad edges. This local differentiation resolves the wicking problem that reduces yield, while maintaining manufacturing simplicity through a systematic layering approach.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the yield of printed electronic devices by 2-fold compared to conventional methods, while reducing material usage and operational costs, with the protective layer providing adequate protection without excessive coverage.
Implementation Method 1
printing a curable composition on the plurality of electrode traces and the plurality of contact pads; and curing the curable composition to form a protective layer
Data Source
AI summary
A coated, printed electronic device may comprise a plurality of contact pads arranged in a pattern, a plurality of electrode traces arranged in another pattern, the plurality of electrode traces comprising a set of bottom electrode traces and a set of top electrode traces, each electrode trace in electrical communication with an associated contact pad of the plurality of contact pads, a plurality of memory cells, each memory cell located at an intersection of a pair of electrode traces of the plurality of electrode traces and comprising a bottom electrode layer formed from a region of one of the bottom electrode traces, a top electrode layer formed from a region of one of the top electrode traces, and a ferroelectric layer between the bottom and top electrode layers, and a protective layer covering the plurality of electrode traces and extending laterally beyond each edge of each electrode trace to provide a buffer zone surrounding each electrode trace, the buffer zone extending from an end of each electrode trace to cover a portion of each associated contact pad in an overlapping region, wherein each contact pad also has at least one uncovered edge.