Protective Layer Prevents Gate-Contact Short Circuits in Semiconductor Devices
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Solution Overview
Problem
In semiconductor manufacturing, existing methods face challenges in preventing short circuits between metal gates and source/drain contacts due to the etching of cap insulating layers during contact hole formation, which can lead to reliability issues in advanced multi-layer metal wiring structures.
Innovation Solution
The introduction of a protective layer made of transition metal nitride-based materials or amorphous silicon over the metal gate, sidewall spacers, and cap insulating layers, which provides etching resistivity and prevents the cap insulating layer from being etched during contact hole formation, thereby avoiding short circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If contact holes are formed by etching through the cap insulating layer to connect source/drain regions, then electrical connectivity is achieved, but the cap insulating layer may be过度 etched causing short circuits between metal gates and source/drain contacts
Solution Approach 1:
A protective layer is introduced as an intermediary between the cap insulating layer and the etching process. This protective layer selectively protects the cap insulating layer during contact hole formation, allowing etching to proceed through the protective layer to create electrical connectivity while preventing过度 etching that would cause short circuits between metal gates and source/drain contacts
Solution Approach 2:
The protective layer is formed in advance before the contact hole etching process. This preliminary action ensures that the cap insulating layer is already protected when etching begins, preventing harmful过度 etching while still allowing the etch to penetrate through the protective layer to establish the necessary electrical connections
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution effectively prevents short circuits between metal gates and source/drain contacts, ensuring the reliability and integrity of the semiconductor device by maintaining the structural integrity of the cap insulating layers and minimizing etching damage.
Implementation Method 1
provides etching resistivity and prevents the cap insulating layer from being etched during contact hole formation
Data Source
AI summary
A semiconductor device includes a first gate structure disposed on a substrate. The first gate structure includes a first gate electrode, a first cap insulating layer disposed over the first gate electrode and first sidewall spacers disposed on both side faces of the first gate electrode and the first cap insulating layer. The semiconductor device further includes a first protective layer formed over the first cap insulating layer and at least one of the first sidewall spacers. The first protective layer includes at least one selected from the group consisting of AlON, AlN and amorphous silicon.