Protective Layer Shields Interlayer Dielectric From Etching Damage
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Solution Overview
Problem
Interlayer dielectric (ILD) layers in semiconductor manufacturing are damaged during etching and cleaning processes, leading to cavity formation and reduced electrical insulation, which can cause short circuits and render semiconductor devices inoperable.
Innovation Solution
A method is introduced that involves forming a protective layer over the ILD layer with different etch selectivity than the replacement gate structure, filling cavities formed in the ILD layer, and planarizing the protective layer to prevent unintentional material removal during subsequent processing steps.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple etching and cleaning processes are applied to ILD layers during manufacturing, then the manufacturing process can be completed, but the ILD layers are damaged and cavities are formed reducing electrical insulation
Solution Approach 1:
A protective layer is formed over the ILD layer before the etching and cleaning processes occur. This preliminary protective action prevents damage to the ILD layer during subsequent manufacturing steps, eliminating cavity formation while allowing the manufacturing process to proceed normally.
Solution Approach 2:
The protective layer acts as an intermediary between the etching/cleaning processes and the ILD layer. It has different etch selectivity than the ILD layer, allowing it to shield the ILD layer from direct exposure to harsh chemicals and plasma, thus maintaining electrical insulation integrity.
2Reliability
If a protective layer is formed over the ILD layer, then electrical insulation is maintained, but the device structure becomes more complex
Solution Approach 1:
The protective layer is designed with specific parameter differences from the ILD layer, particularly in etch selectivity. This allows the protective layer to be selectively removed or differentiated during processing, maintaining its protective function while enabling manageable process control despite the additional layer.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The protective layer effectively shields the ILD layer from damage during etching and cleaning, maintaining electrical insulation and preventing short circuits, thereby ensuring the operational integrity of semiconductor devices.
Implementation Method 1
a protective layer is formed over the replacement gate structure and the ILD layer and fills the cavity
Implementation Method 2
The protective layer is then planarized so that a top surface of the planarized protective layer is level with a top surface of the dummy gate structure
Data Source
AI summary
This description relates to a method including forming an interlayer dielectric (ILD) layer and a dummy gate structure over a substrate and forming a cavity in a top portion of the ILD layer. The method further includes forming a protective layer to fill the cavity. The method further includes planarizing the protective layer. A top surface of the planarized protective layer is level with a top surface of the dummy gate structure. This description also relates to a semiconductor device including first and second gate structures and an ILD layer formed on a substrate. The semiconductor device further includes a protective layer formed on the ILD layer, the protective layer having a different etch selectivity than the ILD layer, where a top surface of the protective layer is level with the top surfaces of the first and second gate structures.