Protective Layer Prevents Isolation Structure Loss in Memory Manufacturing
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Solution Overview
Problem
Conventional semiconductor memory device manufacturing processes result in excessive loss of the isolation structure and generation of polysilicon residue defects at the boundary between the cell array and peripheral regions, leading to reduced reliability and yield.
Innovation Solution
A semiconductor memory device and manufacturing method that includes a protective structure formed by overlapping first and second mask layers, which prevents excessive consumption of the isolation structure during etching, thereby reducing polysilicon residue defects and improving device reliability and yield.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If multiple etching processes are used to define different gate structures in the cell array region and peripheral region, then the gate structures can be properly defined, but the isolation structure undergoes excessive loss
Solution Approach 1:
A protective layer is formed on the isolation structure before the etching processes. This protective layer serves as a preliminary protective measure that prevents the isolation structure from being excessively consumed during the multiple etching steps required to define different gate structures in the cell array and peripheral regions.
Solution Approach 2:
The protective layer acts as an intermediary between the etching process and the isolation structure. It absorbs the harmful effects of the etching process, preventing direct contact between the etchant and the isolation structure, thereby reducing material loss while still allowing the etching to proceed for gate structure definition.
2Manufacturing precision
If multiple etching processes are used to define different gate structures, then the gate structures can be properly defined, but polysilicon residue defects are generated
Solution Approach 1:
The protective layer is formed in advance on the isolation structure before the etching processes. This preliminary protective measure prevents the etchant from excessively attacking the isolation structure, thereby preventing the generation of polysilicon residue defects that would otherwise occur during multiple etching steps.
Solution Approach 2:
The protective layer, which might seem like an additional complex step, actually simplifies the overall process by preventing defects. It converts the potentially harmful multiple etching processes into a controlled operation that defines gate structures precisely without generating polysilicon residue defects.
3Reliability
If the conductive layer is extended to cover the isolation structure in the peripheral region, then the device functionality is improved, but the isolation structure is excessively consumed
Solution Approach 1:
The protective layer is formed on the isolation structure before the conductive layer is deposited and before any etching processes occur. This preliminary protection allows the conductive layer to be extended over the isolation structure for improved device functionality while preventing excessive consumption of the isolation structure during subsequent processing.
Solution Approach 2:
The protective layer serves as an intermediary that allows the conductive layer to interface with the isolation structure without causing excessive consumption. It mediates between the need for extended conductive layer coverage and the need to preserve the isolation structure integrity.
Data Source
AI summary
Provided is a semiconductor memory device including a substrate, an isolation structure, a first gate dielectric layer, a first conductive layer, a second gate dielectric layer, a second conductive layer, and a protective layer. The substrate has an array region and a periphery region. The isolation structure is disposed in the substrate between the array and periphery regions. The first gate dielectric layer is disposed on the substrate in the array region. The first conductive layer is disposed on the first gate dielectric layer. The second gate dielectric layer is disposed on the substrate in the periphery region. The second conductive layer is disposed on the second dielectric layer. The second conductive layer extends to cover a portion of a top surface of the isolation structure. The protective layer is disposed between the second conductive layer and the isolation structure.


