Protective Layer Grooves for Semiconductor Package Adhesion
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Solution Overview
Problem
The existing protective layers in semiconductor wafer manufacturing have a nearly flat surface, leading to poor adhesion with the molding compound layer, resulting in delamination and peeling issues during packaging, which affects device performance.
Innovation Solution
A method is introduced to form grooves on the protective layer covering the chip areas, increasing its surface roughness and area, thereby enhancing the adhesion between the protective layer and the molding compound layer by exposing and developing the protective layer to create grooves with a depth less than the initial thickness of the protective layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the protective layer is formed by spin coating process to provide protection, then the protective layer can be applied to protect chips and serve as packaging material, but the upper surface becomes almost flat which causes poor adhesion to molding compound layer
Solution Approach 1:
The patent applies curvature to the protective layer surface by forming grooves with curved profiles. These grooves introduce surface curvature instead of flatness, creating mechanical interlocking features that enhance adhesion between the protective layer and molding compound layer while maintaining the protective function.
Solution Approach 2:
The patent creates a porous-like structure on the protective layer surface through groove formation. This increased surface roughness and porosity provide more contact area and mechanical anchoring points for the molding compound layer, significantly improving interfacial adhesion.
2Reliability
If the protective layer surface is kept flat for simplicity, then the manufacturing process is simple, but delamination and peeling occur during packaging
Solution Approach 1:
The patent segments the protective layer surface into multiple regions separated by grooves. This segmentation creates distinct zones that enhance mechanical interlocking with the molding compound layer, preventing delamination while maintaining overall structural integrity.
Solution Approach 2:
The patent transitions from a two-dimensional flat surface to a three-dimensional structured surface by adding vertical depth through groove formation. This dimensional change increases the effective bonding area and creates mechanical keys that prevent peeling during packaging operations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The increased surface roughness and area of the protective layer improve the adhesion with the molding compound layer, reducing delamination and peeling, thus enhancing the performance and reliability of the semiconductor device.
Implementation Method 1
The protective layer is exposed and developed to form a plurality of grooves where the protective layer covers the chip areas
Data Source
AI summary
A fabrication method of a semiconductor device comprises the steps of: providing a substrate, which is divided into several chip areas; forming a protective layer on the substrate, the protective layer covers the scribe lines and the chip areas; exposing and developing the protective layer to form a plurality of grooves in the protective layer over the chip areas, and the depth of the grooves is smaller than the initial thickness of the protective layer.