Protective Layer Shields Source Drain in Semiconductor Fabrication
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
During the fabrication of dynamic memory access transistors, the source or drain can be damaged or contaminated, which affects the electrical properties and reliability of the semiconductor structure.
Innovation Solution
A method is developed to form a protective layer on the side walls of semiconductor channels and spacers, which prevents oxidation and contamination of the source or drain, improving their reliability by using a specific sequence of spacer and protective layer formation, including annealing processes and material selection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional fabrication processes are used to form vertical GAA transistor structures, then transistor density can be improved, but source or drain regions become damaged or contaminated during fabrication
Solution Approach 1:
The protective layer is formed in advance before subsequent fabrication steps that could cause damage. The method forms spacers and protective layers on semiconductor channels before forming source/drain regions, ensuring the source/drain regions are protected during later processing steps such as etching and deposition operations
Solution Approach 2:
The protective layer acts as an intermediary barrier between the source/drain regions and the fabrication environment. This intermediate layer prevents direct exposure of the source/drain regions to contaminants and damage during fabrication, while still allowing the fabrication process to proceed
2Reliability
If protective measures are added to prevent source or drain damage, then source or drain integrity is improved, but fabrication process complexity increases
Solution Approach 1:
The protective layer formation is merged with the existing spacer formation process. The same spacer formation steps that define transistor geometry also create the protective structures, combining multiple functions into a single integrated process sequence rather than adding separate protective layer deposition steps
Solution Approach 2:
The spacers serve multiple functions simultaneously: they define the geometric boundaries of the vertical GAA transistor channels and concurrently form protective layers that shield the source/drain regions. This multi-functionality eliminates the need for separate protective structures
Data Source
AI summary
Embodiments provide a method for fabricating a semiconductor structure. The method includes: providing a substrate, where the substrate includes semiconductor channels arranged in an array along a first direction and a second direction, and a part of the substrate is exposed between adjacent semiconductor channels; forming a spacer positioned between adjacent semiconductor channels, where a top surface of the spacer is lower than top surfaces of the semiconductor channels; forming a bit line positioned in the substrate, where a top surface of the bit line contacts and connects bottom surfaces of the semiconductor channels; forming a protective layer, where a part of the protective layer is positioned on the top surface of the spacer between the semiconductor channels arranged along the second direction, and another part of the protective layer is positioned on the top surface of the spacer between the semiconductor channels arranged along the first direction.