Protective Layer Etch-Back for STI and Bottom Spacer Integrity

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Solution Overview

Problem

As minimum feature size reduces in semiconductor fabrication, the protective layer formed by etch back processes does not provide sufficient protection to bottom materials/structures during subsequent removal and patterning processes, leading to issues like current leakage, structure damage, and non-uniform etching.

Innovation Solution

An etch back process is used to form a protective layer over bottom materials/structures, such as STI and bottom spacers, to prevent damage during S/D loop stages, using materials like silicon oxide or metal oxides to enhance protection and control etching rates.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If etch back process is used to form protective layer, then bottom materials/structures are protected during removal and patterning, but the protective layer size reduces with minimum feature size reduction and becomes insufficient

Engineering Contradiction:
Improveprotection effectivenessVSAvoidprotective layer size
Core Design Contradiction:
ReliabilityVSLength of moving object

Solution Approach 1:

The patent applies preliminary action by forming the protective layer through etch back process before the removal and patterning of bottom materials. This ensures the protective layer is in place beforehand to prevent damage during subsequent processing steps. The protective layer is formed in advance to compensate for the size reduction issue, maintaining adequate protection even as feature sizes shrink.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent employs parameter changes by adjusting the etch back depth and protective layer thickness parameters to maintain effective protection as minimum feature sizes reduce. By dynamically changing these parameters in response to scaling requirements, the protective layer remains sufficient in size despite overall device dimension reduction.

Inventive Principle:
Principle #35Parameter changes

2Strength

If protective layer is formed to prevent damage, then structure integrity is maintained, but current leakage and non-uniform etching occur

Engineering Contradiction:
Improvestructural integrityVSAvoidcurrent leakage
Core Design Contradiction:
StrengthVSObject-generated harmful factors

Solution Approach 1:

The patent applies local quality by ensuring the protective layer provides uniform coverage and consistent properties across different regions of the bottom materials. This localized quality control prevents current leakage paths while maintaining structural integrity. The protective layer's material composition and thickness are optimized locally to match the specific protection requirements of different areas.

Inventive Principle:
Principle #3Local quality

3Reliability

If etch back process is used to form protective layer, then bottom spacers are protected during S/D loop, but process complexity increases

Engineering Contradiction:
Improvebottom spacer protectionVSAvoidfabrication process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies universality by designing the protective layer to serve multiple functions simultaneously: protecting bottom spacers during S/D loop, preventing current leakage, and maintaining structural integrity throughout subsequent processing. This multi-functionality reduces the need for additional separate protective structures, thereby limiting the increase in process complexity while achieving comprehensive protection.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The protective layer effectively prevents STI and bottom spacer loss, reducing leaks and improving device performance by maintaining structural integrity and uniformity during etching, allowing for more precise and efficient semiconductor fabrication.

Implementation Method 1

an etch back process is used to form a protective layer on bottom materials/structures

Methodology Applied
Scientific EffectEtching:

Data Source

PatentUS20250364312A1Method for forming a semiconductor device and devices fabricated thereof
Publication Date: 2025.11.27 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20250364312A1 patent drawing
  • US20250364312A1 patent drawing
  • US20250364312A1 patent drawing

AI summary

Embodiments of the present disclosure provide a protective layer deposited over bottom structures to protect the bottom structure during fabrication of upper structures. The protective layer may prevent STI loss and bottom spacer loss during source/drain etch back process. The protective layer may also improve process uniformity by also eliminate process loading or non-uniformity in the STI loss, fin sidewall spacer height, and recess profiles. The protective layer may also slow down fin sidewall spacer etching rate during semiconductor fin etch back, thus, improving source/drain regions profile control.