Protective Oxidation Layer for 3D NAND Stair Structures

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The challenge in manufacturing vertical type memory cell semiconductor devices is the formation of stair-like structures with accurate profiles and dimension control, particularly in three-dimensional stacking, where residual materials and surface roughness at interfaces lead to poor electrical contact and performance degradation due to selective etching.

Innovation Solution

The use of a protective oxidation layer, such as a sacrificial oxidation layer, during the etching process to manage interfaces and enable selective deposition and patterning, allowing for the formation of metal dielectric layers and conductive structures with improved control over interface profiles and topography, thereby ensuring good electrical contact.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If selective etching is performed to replace dielectric layers with metal containing layers in stair-like structures, then electrical performance is improved, but residuals and surface roughness are created at interfaces leading to poor electrical contact

Engineering Contradiction:
Improveelectrical performanceVSAvoidinterface quality
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

A protective oxidation layer is formed on the first layer (e.g., silicon nitride) before the metal containing layer is deposited. This preliminary oxidation creates a sacrificial layer that protects the interface during subsequent etching processes, preventing residuals and surface roughness from forming at critical interfaces, thus maintaining both electrical performance and interface quality

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The protective oxidation layer acts as an intermediary between the first layer and the metal containing layer. It serves as a sacrificial mediator that can be selectively removed later to expose clean interfaces, enabling good electrical contact while protecting the underlying structure during the metal layer formation process

Inventive Principle:
Principle #24Intermediary (Mediator)

2Manufacturing precision

If photoresist trimming is repeatedly performed to form stair-like structures with different widths, then dimension control is achieved, but process complexity and time increase

Engineering Contradiction:
Improvedimension controlVSAvoidprocess complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The formation process is segmented into distinct stages: first forming the protective oxidation layer, then depositing the metal containing layer, and finally selectively removing the first layer. This segmentation allows each step to be optimized independently, achieving precise dimension control for different stair widths while managing process complexity through systematic breakdown of operations

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention changes the physical and chemical parameters of the interface by forming an oxidation layer with different etch selectivity compared to surrounding materials. This parameter change enables precise control of stair-like structure dimensions through selective removal processes, achieving accurate profiles without requiring repeated photoresist trimming operations

Inventive Principle:
Principle #35Parameter changes

3Manufacturing precision

If the first layer is selectively removed to expose the protective oxidation layer, then interface management is improved, but additional process steps are required

Engineering Contradiction:
Improveinterface managementVSAvoidfabrication efficiency
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The first layer (e.g., silicon nitride) is selectively extracted or removed from the structure after the protective oxidation layer has been formed. This extraction exposes the protective oxidation layer at the interface, enabling precise interface management. The removed first layer can be discarded, and the protective layer serves its purpose before being removed in a subsequent step, achieving excellent interface control

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The protective oxidation layer functions as a disposable sacrificial element. It is formed temporarily to protect and define the interface during critical processing steps, then selectively removed when no longer needed. This disposable approach enables excellent interface management without requiring permanent structural changes, and the temporary nature of the protective layer allows for precise control

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances electrical performance by maintaining interface integrity and allowing for precise control of stair-like structure dimensions, leading to improved reliability and performance of three-dimensional memory cell semiconductor devices.

Implementation Method 1

The use of a protective oxidation layer, such as a sacrificial oxidation layer, during the etching process to manage interfaces and enable selective deposition and patterning

Methodology Applied
Scientific EffectOxidation: Oxidation

Data Source

PatentUS11574924B2Memory cell fabrication for 3D NAND applications
Publication Date: 2023.02.07 APPLIED MATERIALS INC
  • US11574924B2 patent drawing
  • US11574924B2 patent drawing
  • US11574924B2 patent drawing

AI summary

Embodiments of the present disclosure provide an apparatus and methods for forming stair-like structures with accurate profiles and dimension control for manufacturing three dimensional (3D) stacked memory cell semiconductor devices. In one embodiment, a memory cell device includes a film stack comprising alternating pairs of dielectric layers and conductive structures horizontally formed on a substrate, and an opening formed in the film stack, wherein the opening is filled with a metal dielectric layer, a multi-layer structure and a center filling layer, wherein the metal dielectric layer in the opening is interfaced with the conductive structure.