Protocol Accelerator Offloading Routine TCP Processing
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Solution Overview
Problem
Current communications processors face increased workload due to rising data transmission rates, necessitating more efficient offloading of routine communications protocol processing tasks from host processors to dedicated hardware.
Innovation Solution
A protocol accelerator extracts queue identifiers from incoming packets, handles routine transport layer processing, and interrupts the processor for exceptional cases, allowing for efficient distribution of tasks between hardware and software processing paths, including adjustments to the TCP congestion window size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If more data transmission rates are achieved through continued development of computer network hardware, then data transmission capability is improved, but processor workload increases and processing speed requirements increase
Solution Approach 1:
The patent extracts routine communications protocol processing tasks from the host processor and implements them in dedicated hardware offload engines. This extraction allows the host processor to focus on higher-value tasks while the hardware engine handles repetitive protocol operations, thereby maintaining high data transmission rates without proportionally increasing processor workload.
Solution Approach 2:
The patent segments the communications processing function into distinct components: a host processor for exception handling and a dedicated hardware offload engine for routine processing. This segmentation divides the processing workload based on complexity and frequency, allowing each component to operate optimally for its specific tasks.
2Productivity
If routine communications protocol processing is offloaded to dedicated hardware, then processor workload is reduced, but device complexity increases
Solution Approach 1:
The patent implements a configurable offload engine that can handle multiple protocol types and processing functions through a unified hardware architecture. By designing the offload engine with configurable instruction sets and support for various communications protocols, the system achieves multi-functionality that reduces overall device complexity compared to having separate dedicated hardware for each protocol.
Solution Approach 2:
The patent employs configurable parameters and stateful operation modes in the offload engine, allowing it to adapt to different protocol requirements through parameter changes rather than requiring separate hardware implementations. This configurability enables a single hardware module to perform multiple functions by changing its operational parameters.
3Adaptability or versatility
If all packet processing is handled by host protocol stack, then processing flexibility is maintained, but processing time and performance impact increase
Solution Approach 1:
The patent applies partial offloading by handling only the routine, high-frequency processing tasks in hardware while retaining exception handling and complex decision-making logic in the host processor. This partial action approach optimizes performance for the majority of packets while maintaining full flexibility for edge cases, achieving a balance between speed and adaptability.
Solution Approach 2:
The patent introduces an intermediary mechanism (interrupt-based communication) between the hardware offload engine and host processor. This intermediary allows efficient coordination where the hardware engine processes packets autonomously and notifies the host processor only when exceptions occur, minimizing the time the host processor needs to be involved in routine processing.
Data Source
AI summary
In some examples, a protocol accelerator extracts a queue identifier from an incoming packet, for identifying a first buffer queue in which the packet is to be stored for transport layer processing. A packet having an error or condition is identified, such that the accelerator cannot perform the processing on that packet. A processor is interrupted. The identified packet is stored in a second buffer queue. The processor performs transport layer processing in response to the interrupt, while the accelerator continues transport layer processing of packets in the first buffer queue. In some examples, a TCP congestion window size is adjusted. A programmable congestion window increment value is provided. The window size is set to an initial value at the beginning of a TCP data transmission. The window size is increased by the increment value when an acknowledgement is received.