Protocol Analyzer Hardware Pattern Matching for Fast Trace Search
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Solution Overview
Problem
Current protocol analyzers require post-processing for data analysis, which is inefficient and slow, especially when searching large trace memories, as they often rely on separate search devices and software algorithms.
Innovation Solution
A protocol analyzer with a data switch, pattern matcher, and trace memory that allows for real-time data acquisition and searching within the same device, using the pattern matcher for both data acquisition and search processes, eliminating the need for uploading data to a separate search device and leveraging hardware-based comparison for faster search times.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If a separate search device and software algorithms are used for data searching, then the analyzer can handle large trace memories, but the search time becomes excessively long
Solution Approach 1:
The patent merges the search function into the protocol analyzer itself by integrating a pattern matcher that can search captured data directly within the analyzer. This eliminates the need to upload data to external devices and enables hardware-accelerated searching, dramatically reducing search time while maintaining the ability to handle large trace memories.
Solution Approach 2:
The patent replaces software-based search algorithms with a hardware-based pattern matcher. This substitution of mechanical/computational approach enables parallel processing and significantly faster search operations compared to sequential software processing, resolving the time penalty associated with large data volumes.
2Productivity
If data is uploaded to a separate search device for analysis, then the search can be performed, but the overall test time increases significantly
Solution Approach 1:
The patent combines data capture and data search functions within a single integrated device. The protocol analyzer captures data via a data switch and subsequently searches the captured data using its internal pattern matcher, eliminating the time-consuming data transfer to external devices and enabling immediate analysis.
Solution Approach 2:
The patent performs data capture and stores it in an internal trace memory before searching begins. This preliminary action allows the search operation to start immediately on already-captured data without waiting for data transfer, and the hardware pattern matcher processes the data in parallel, reducing overall test time.
3Speed
If hardware-based pattern matching is used for both data acquisition and searching, then search speed increases dramatically, but the device complexity increases
Solution Approach 1:
The patent designs the pattern matcher as a multi-functional hardware unit that performs both data acquisition (pattern detection in incoming streams) and data search (pattern detection in captured data). This universal component handles multiple functions with a single hardware architecture, increasing speed without proportionally increasing overall device complexity.
Solution Approach 2:
The patent implements a dynamic data switch that can route incoming data streams to different destinations (pattern matcher for acquisition, trace memory for storage, or both simultaneously). This dynamic routing capability allows the system to flexibly manage data flow for different operational modes, optimizing performance without requiring separate dedicated hardware for each function.
Data Source
AI summary
A data analyzer for analyzing an incoming data stream, comprising a pattern matcher adapted for comparing in a first step the first data stream with a first data pattern and in a second step a second data stream with a second data pattern and for generating a match signal indicative of a match between the first data stream and the first data pattern or between the second data stream and the second data pattern, a trace memory adapted for storing a part of the first data stream dependent on the match signal of the first step, and for outputting stored data as second data stream in a second step and a data switch adapted for receiving the first data stream and the second data stream, and to be set in the first step to a first state for providing the pattern matcher with the first data stream and in the second step to a second state for providing the pattern matcher with the second data stream.