Protocol Aware Circuit for SOC Test Automation
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Solution Overview
Problem
Current automated test equipment systems struggle to accurately test system-on-a-chip (SOC) devices due to their nondeterministic behavior, which makes it difficult to recreate the normal operating environment and measure the device's tolerance under varying conditions, leading to inefficiencies and potential false test results.
Innovation Solution
A protocol specific circuit is introduced that can simulate the functional operational environment of SOC devices by interpreting non-deterministic signals to determine synchronization and latency times for test stimulus signals, allowing the automatic test equipment to respond as if the device is operating in its normal environment, using a configurable protocol aware circuit and memory buffers like FIFOs to store and manage test signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If deterministic test operations are used with fixed timing and structure for test stimulus and response signals, then test automation and efficiency are improved, but accurate testing of asynchronous SOC devices is degraded leading to false test results
Solution Approach 1:
The test equipment transitions from rigid deterministic timing to dynamic adaptive timing by detecting asynchronous response signals and adjusting subsequent stimulus signal timing accordingly. The system dynamically synchronizes test operations with the actual operating timing of the SOC device under test, allowing accurate testing while maintaining automation.
Solution Approach 2:
The system incorporates feedback mechanisms where the timing and structure of test response signals from the SOC device are continuously monitored and used to adjust the timing of subsequent test stimulus signals. This closed-loop feedback enables the test equipment to adapt to asynchronous operations and accurately capture device behavior.
2Reliability
If custom functional test apparatuses are built for System Level Test of specific SOC devices, then test accuracy is improved, but cost effectiveness is degraded for low average selling price devices
Solution Approach 1:
The test equipment incorporates a reconfigurable protocol aware circuit that can be configured to support multiple different protocols and SOC device types through software/firmware programming rather than hardware customization. This universal approach enables accurate system level testing across different device families while maintaining cost effectiveness for high-volume production of lower-cost devices.
3Speed
If the operating speed of devices to be tested is increased, then device performance is improved, but the margin of error for edge placement accuracy decreases
Solution Approach 1:
The test equipment uses the SOC device's own operating clock signals to synchronize and measure edge placement accuracy. By referencing the device's internal timing rather than external test equipment timing, the system achieves accurate measurements at high operating speeds without being limited by external clock synchronization errors.
4Adaptability or versatility
If present automatic test equipment systems attempt to simulate operating conditions of SOC devices, then test coverage is improved, but the ability to accurately provide nondeterministic electrical and timing conditions is degraded
Solution Approach 1:
The protocol aware circuit dynamically adapts its output timing and electrical characteristics based on the actual responses from the SOC device. Rather than using fixed predetermined sequences, the system generates nondeterministic test conditions that closely match real operating environments by responding adaptively to device behavior, achieving both coverage and accuracy.
Data Source
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AI summary
In one embodiment, provided is a protocol specific circuit for simulating a functional operational environment into which a device-under-test is placed for functional testing. The protocol specific circuit includes a protocol aware circuit constructed to receive a non-deterministic signal communicated by a device-under-test and to control a transfer of the test stimulus signal to the device-under-test in response to the a non-deterministic signal.